21template <
typename SpiType>
23 : spi_interface_(spi_interface), initialized_(false), statistics_(),
24 last_fault_byte_(0xFF), cached_status_(), board_config_(),
25 fault_callback_(nullptr), fault_user_data_(nullptr),
26 state_callback_(nullptr), state_user_data_(nullptr) {}
28template <
typename SpiType>
30 : spi_interface_(spi_interface), initialized_(false), statistics_(),
31 last_fault_byte_(0xFF), cached_status_(), board_config_(board_config),
32 fault_callback_(nullptr), fault_user_data_(nullptr),
33 state_callback_(nullptr), state_user_data_(nullptr) {}
35template <
typename SpiType>
46template <
typename SpiType>
53 if (!spi_interface_.Initialize()) {
54 updateStatistics(
false);
60 updateStatistics(
false);
68 constexpr int kMaxInitRetries = 3;
72 for (
int attempt = 0; attempt < kMaxInitRetries; ++attempt) {
74 result = ReadStatus(status);
77 updateStatistics(
false);
90 result = WriteStatus(status);
93 updateStatistics(
false);
101 cached_status_ = status;
108 result = ReadStatus(status);
111 updateStatistics(
false);
123 cached_status_ = status;
125 updateStatistics(
true);
131 updateStatistics(
false);
135template <
typename SpiType>
142 DisableAllChannels();
145 cached_status_.active =
false;
146 cached_status_.channels_on_mask = 0;
147 WriteStatus(cached_status_);
152 initialized_ =
false;
153 updateStatistics(
true);
157template <
typename SpiType>
166template <
typename SpiType>
172 cached_status_ = status;
175 notifyStatusFaults(status);
181template <
typename SpiType>
186 cached_status_ = status;
195template <
typename SpiType>
198 if (!IsValidChannel(channel)) {
199 updateStatistics(
false);
205 updateStatistics(
false);
212 updateStatistics(
false);
216 uint32_t reg_val = config.
toRegister(board_config_.full_scale_current_ma, cached_status_.master_clock_80khz);
222template <
typename SpiType>
225 if (!IsValidChannel(channel)) {
226 updateStatistics(
false);
234 config.
fromRegister(raw, board_config_.full_scale_current_ma, cached_status_.master_clock_80khz);
240template <
typename SpiType>
245 DriverStatus result = ConfigureChannel(ch, configs[ch]);
253template <
typename SpiType>
258 DriverStatus result = GetChannelConfig(ch, configs[ch]);
270template <
typename SpiType>
272 return SetChannelEnabled(channel,
true);
275template <
typename SpiType>
277 return SetChannelEnabled(channel,
false);
280template <
typename SpiType>
282 if (!IsValidChannel(channel)) {
283 updateStatistics(
false);
287 cached_status_.channels_on_mask |= (1u << channel);
289 cached_status_.channels_on_mask &= ~(1u << channel);
291 return SetChannelsOn(cached_status_.channels_on_mask);
294template <
typename SpiType>
296 return SetAllChannelsEnabled(
true);
299template <
typename SpiType>
301 return SetAllChannelsEnabled(
false);
304template <
typename SpiType>
306 cached_status_.channels_on_mask = enable ? 0xFFu : 0x00u;
307 return SetChannelsOn(cached_status_.channels_on_mask);
310template <
typename SpiType>
312 cached_status_.channels_on_mask = channel_mask;
318template <
typename SpiType>
321 if (pair_index > 3) {
322 updateStatistics(
false);
325 const uint8_t shift = pair_index * 2;
326 const uint8_t pair_mask = 3u << shift;
345 cached_status_.channels_on_mask = (cached_status_.channels_on_mask & ~pair_mask) | bits;
346 return SetChannelsOn(cached_status_.channels_on_mask);
353template <
typename SpiType>
359 notifyFaults(faults);
365template <
typename SpiType>
368 return ReadFaultRegister(f);
371template <
typename SpiType>
376 channel_mask, channel_mask, channel_mask, channel_mask, temp);
383template <
typename SpiType>
385 uint8_t ocp_mask, uint8_t hhf_mask, uint8_t olf_mask, uint8_t dpm_mask,
389 updateStatistics(
false);
392 const uint8_t tx[4] = {ocp_mask, hhf_mask, olf_mask, dpm_mask};
394 result = readData32WithTx(tx, raw);
397 notifyFaults(faults);
403template <
typename SpiType>
405 return ReadStatus(status);
408template <
typename SpiType>
414 cached_status_ = status;
419template <
typename SpiType>
430template <
typename SpiType>
437template <
typename SpiType>
445 bool enable = (channel_mask & (1u << ch)) != 0;
448 result = ConfigureChannel(ch, config);
457template <
typename SpiType>
459 float dip_threshold_ma,
470 updateStatistics(
false);
477 if (found && cf != chop_freq) {
479 updateStatistics(
false);
485 return ConfigureDpm(start_current_ma, dip_threshold_ma, debounce_ms, chop_freq);
488template <
typename SpiType>
490 float dip_threshold_ma,
493 if (board_config_.full_scale_current_ma == 0 || !(debounce_ms >= 0.0f) ||
494 !(start_current_ma >= 0.0f) || !(dip_threshold_ma >= 0.0f)) {
495 updateStatistics(
false);
504 float ratio = start_current_ma /
static_cast<float>(board_config_.full_scale_current_ma);
505 uint32_t istart =
static_cast<uint32_t
>(ratio * 127.0f + 0.5f);
507 ratio = dip_threshold_ma /
static_cast<float>(board_config_.full_scale_current_ma);
508 uint32_t ipth =
static_cast<uint32_t
>(ratio * 127.0f + 0.5f);
513 const uint32_t periods =
static_cast<uint32_t
>(debounce_ms * fchop_khz + 0.5f);
515 return WriteDpmConfig(config);
522template <
typename SpiType>
524 return SetDeviceEnable(
true);
527template <
typename SpiType>
529 return SetDeviceEnable(
false);
532template <
typename SpiType>
539 updateStatistics(
true);
543template <
typename SpiType>
557template <
typename SpiType>
559 uint32_t &value)
const {
560 return readReg32(bank, value);
563template <
typename SpiType>
565 return writeReg32(bank, value);
568template <
typename SpiType>
570 uint8_t &value)
const {
571 return readReg8(bank, value);
574template <
typename SpiType>
576 return writeReg8(bank, value);
579template <
typename SpiType>
581 return last_fault_byte_;
588template <
typename SpiType>
593template <
typename SpiType>
602template <
typename SpiType>
604 if (fault_callback_ ==
nullptr) {
608 const uint8_t bit =
static_cast<uint8_t
>(1u << ch);
618template <
typename SpiType>
619void MAX22200<SpiType>::notifyStatusFaults(
const StatusConfig &status)
const {
620 if (fault_callback_ ==
nullptr) {
625 if (status.overtemperature) fault_callback_(0xFF,
FaultType::OVT, fault_user_data_);
626 if (status.undervoltage) fault_callback_(0xFF,
FaultType::UVM, fault_user_data_);
627 if (status.communication_error) fault_callback_(0xFF,
FaultType::COMER, fault_user_data_);
630template <
typename SpiType>
633 fault_callback_ = callback;
634 fault_user_data_ = user_data;
637template <
typename SpiType>
640 state_callback_ = callback;
641 state_user_data_ = user_data;
656template <
typename SpiType>
661 uint8_t rx_byte = 0xFF;
668 bool success = spi_interface_.Transfer(&cmd_byte, &rx_byte, 1);
678 last_fault_byte_ = rx_byte;
690template <
typename SpiType>
691DriverStatus MAX22200<SpiType>::writeData32(uint32_t value)
const {
693 static_cast<uint8_t
>(value & 0xFF),
694 static_cast<uint8_t
>((value >> 8) & 0xFF),
695 static_cast<uint8_t
>((value >> 16) & 0xFF),
696 static_cast<uint8_t
>((value >> 24) & 0xFF)};
699 bool success = spi_interface_.Transfer(tx, rx, 4);
712template <
typename SpiType>
713DriverStatus MAX22200<SpiType>::readData32(uint32_t &value)
const {
714 uint8_t tx[4] = {0, 0, 0, 0};
717 bool success = spi_interface_.Transfer(tx, rx, 4);
722 value = (
static_cast<uint32_t
>(rx[0]) << 24) |
723 (
static_cast<uint32_t
>(rx[1]) << 16) |
724 (
static_cast<uint32_t
>(rx[2]) << 8) |
725 static_cast<uint32_t
>(rx[3]);
729template <
typename SpiType>
730DriverStatus MAX22200<SpiType>::readData32WithTx(
const uint8_t tx[4],
731 uint32_t &value)
const {
733 bool success = spi_interface_.Transfer(tx, rx, 4);
737 value = (
static_cast<uint32_t
>(rx[0]) << 24) |
738 (
static_cast<uint32_t
>(rx[1]) << 16) |
739 (
static_cast<uint32_t
>(rx[2]) << 8) |
740 static_cast<uint32_t
>(rx[3]);
751template <
typename SpiType>
752DriverStatus MAX22200<SpiType>::writeData8(uint8_t value)
const {
754 bool success = spi_interface_.Transfer(&value, &rx, 1);
767template <
typename SpiType>
768DriverStatus MAX22200<SpiType>::readData8(uint8_t &value)
const {
770 bool success = spi_interface_.Transfer(&tx, &value, 1);
781template <
typename SpiType>
783 uint32_t value)
const {
784 DriverStatus result = writeCommandRegister(bank,
true,
false);
786 return writeData32(value);
789template <
typename SpiType>
791 uint32_t &value)
const {
792 DriverStatus result = writeCommandRegister(bank,
false,
false);
794 return readData32(value);
797template <
typename SpiType>
798DriverStatus MAX22200<SpiType>::writeReg8(uint8_t bank, uint8_t value)
const {
799 DriverStatus result = writeCommandRegister(bank,
true,
true);
801 return writeData8(value);
804template <
typename SpiType>
805DriverStatus MAX22200<SpiType>::readReg8(uint8_t bank, uint8_t &value)
const {
806 DriverStatus result = writeCommandRegister(bank,
false,
true);
808 return readData8(value);
815template <
typename SpiType>
817 board_config_ = config;
820template <
typename SpiType>
822 return board_config_;
829template <
typename SpiType>
831 if (!IsValidChannel(channel) || board_config_.full_scale_current_ma == 0) {
832 updateStatistics(
false);
837 if (board_config_.max_current_ma > 0 && ma > board_config_.max_current_ma) {
838 ma = board_config_.max_current_ma;
842 DriverStatus result = GetChannelConfig(channel, config);
849 updateStatistics(
false);
853 return ConfigureChannel(channel, config);
856template <
typename SpiType>
858 if (!IsValidChannel(channel) || board_config_.full_scale_current_ma == 0) {
859 updateStatistics(
false);
863 if (board_config_.max_current_ma > 0 && ma > board_config_.max_current_ma) {
864 ma = board_config_.max_current_ma;
868 DriverStatus result = GetChannelConfig(channel, config);
875 updateStatistics(
false);
879 return ConfigureChannel(channel, config);
882template <
typename SpiType>
884 return SetHitCurrentMa(channel,
static_cast<uint32_t
>(amps * 1000.0f + 0.5f));
887template <
typename SpiType>
889 return SetHoldCurrentMa(channel,
static_cast<uint32_t
>(amps * 1000.0f + 0.5f));
892template <
typename SpiType>
894 if (!IsValidChannel(channel) || board_config_.full_scale_current_ma == 0) {
895 updateStatistics(
false);
900 if (percent < 0.0f) percent = 0.0f;
901 if (percent > 100.0f) percent = 100.0f;
904 uint32_t ma =
static_cast<uint32_t
>((percent / 100.0f) * board_config_.full_scale_current_ma + 0.5f);
905 return SetHitCurrentMa(channel, ma);
908template <
typename SpiType>
910 if (!IsValidChannel(channel) || board_config_.full_scale_current_ma == 0) {
911 updateStatistics(
false);
915 if (percent < 0.0f) percent = 0.0f;
916 if (percent > 100.0f) percent = 100.0f;
918 uint32_t ma =
static_cast<uint32_t
>((percent / 100.0f) * board_config_.full_scale_current_ma + 0.5f);
919 return SetHoldCurrentMa(channel, ma);
922template <
typename SpiType>
924 if (!IsValidChannel(channel) || board_config_.full_scale_current_ma == 0) {
925 updateStatistics(
false);
930 DriverStatus result = GetChannelConfig(channel, config);
940template <
typename SpiType>
942 if (!IsValidChannel(channel) || board_config_.full_scale_current_ma == 0) {
943 updateStatistics(
false);
948 DriverStatus result = GetChannelConfig(channel, config);
958template <
typename SpiType>
960 float &percent)
const {
961 if (!IsValidChannel(channel)) {
962 updateStatistics(
false);
967 DriverStatus result = GetChannelConfig(channel, config);
972 if (board_config_.full_scale_current_ma > 0) {
973 percent = (config.
hit_setpoint /
static_cast<float>(board_config_.full_scale_current_ma)) * 100.0f;
980template <
typename SpiType>
982 float &percent)
const {
983 if (!IsValidChannel(channel)) {
984 updateStatistics(
false);
989 DriverStatus result = GetChannelConfig(channel, config);
994 if (board_config_.full_scale_current_ma > 0) {
995 percent = (config.
hold_setpoint /
static_cast<float>(board_config_.full_scale_current_ma)) * 100.0f;
1006template <
typename SpiType>
1008 if (!IsValidChannel(channel)) {
1009 updateStatistics(
false);
1014 if (board_config_.max_duty_percent > 0 && percent > board_config_.max_duty_percent) {
1015 percent = board_config_.max_duty_percent;
1020 DriverStatus result = GetChannelConfig(channel, config);
1026 updateStatistics(
false);
1042 return ConfigureChannel(channel, config);
1045template <
typename SpiType>
1047 if (!IsValidChannel(channel)) {
1048 updateStatistics(
false);
1052 if (board_config_.max_duty_percent > 0 && percent > board_config_.max_duty_percent) {
1053 percent = board_config_.max_duty_percent;
1057 DriverStatus result = GetChannelConfig(channel, config);
1063 updateStatistics(
false);
1077 return ConfigureChannel(channel, config);
1080template <
typename SpiType>
1082 float &percent)
const {
1083 if (!IsValidChannel(channel)) {
1084 updateStatistics(
false);
1089 DriverStatus result = GetChannelConfig(channel, config);
1099template <
typename SpiType>
1101 float &percent)
const {
1102 if (!IsValidChannel(channel)) {
1103 updateStatistics(
false);
1108 DriverStatus result = GetChannelConfig(channel, config);
1118template <
typename SpiType>
1120 if (!IsValidChannel(channel)) {
1124 DriverStatus result = GetChannelConfig(channel, config);
1128 return GetDutyLimits(cached_status_.master_clock_80khz, config.
chop_freq,
1132template <
typename SpiType>
1134 bool slew_rate_control_enabled,
DutyLimits &limits) {
1137 switch (chop_freq) {
1139 fchop_khz = master_clock_80khz ? 20 : 25;
1142 fchop_khz = master_clock_80khz ? 26 : 33;
1145 fchop_khz = master_clock_80khz ? 40 : 50;
1148 fchop_khz = master_clock_80khz ? 80 : 100;
1156 if (slew_rate_control_enabled) {
1158 if (fchop_khz == 100 || fchop_khz == 80) {
1168 if (fchop_khz == 100 || fchop_khz == 80) {
1186template <
typename SpiType>
1188 if (!IsValidChannel(channel)) {
1189 updateStatistics(
false);
1194 DriverStatus result = GetChannelConfig(channel, config);
1200 if (!std::isfinite(ms)) {
1201 updateStatistics(
false);
1206 updateStatistics(
false);
1211 return ConfigureChannel(channel, config);
1214template <
typename SpiType>
1216 if (!IsValidChannel(channel)) {
1217 updateStatistics(
false);
1222 DriverStatus result = GetChannelConfig(channel, config);
1236template <
typename SpiType>
1238 uint8_t channel, uint32_t hit_ma, uint32_t hold_ma,
float hit_time_ms,
1240 bool open_load_detection_enabled,
bool plunger_movement_detection_enabled,
1241 bool hit_current_check_enabled) {
1242 if (!IsValidChannel(channel) || board_config_.full_scale_current_ma == 0) {
1243 updateStatistics(
false);
1257 if (board_config_.max_current_ma > 0 && hit_ma > board_config_.max_current_ma) {
1258 hit_ma = board_config_.max_current_ma;
1260 if (board_config_.max_current_ma > 0 && hold_ma > board_config_.max_current_ma) {
1261 hold_ma = board_config_.max_current_ma;
1269 return ConfigureChannel(channel, config);
1272template <
typename SpiType>
1274 uint8_t channel,
float hit_duty_percent,
float hold_duty_percent,
1276 bool slew_rate_control_enabled,
bool open_load_detection_enabled,
1277 bool plunger_movement_detection_enabled,
bool hit_current_check_enabled) {
1278 if (!IsValidChannel(channel)) {
1279 updateStatistics(
false);
1293 if (board_config_.max_duty_percent > 0 &&
1294 hit_duty_percent > board_config_.max_duty_percent) {
1295 hit_duty_percent = board_config_.max_duty_percent;
1297 if (board_config_.max_duty_percent > 0 &&
1298 hold_duty_percent > board_config_.max_duty_percent) {
1299 hold_duty_percent = board_config_.max_duty_percent;
1304 DriverStatus result = GetDutyLimits(cached_status_.master_clock_80khz, chop_freq,
1305 slew_rate_control_enabled, limits);
1319 return ConfigureChannel(channel, config);
1326template <
typename SpiType>
1328 statistics_.total_transfers++;
1330 statistics_.failed_transfers++;
Main driver class for MAX22200 IC.
Definition max22200.hpp:133
DriverStatus ReadRegister8(uint8_t bank, uint8_t &value) const
Read 8-bit MSB of a register (fast 8-bit mode)
Definition max22200.ipp:569
DriverStatus SetChannelEnabled(uint8_t channel, bool enable)
Set a channel on or off (convenience when toggling from a variable)
Definition max22200.ipp:281
DriverStatus DisableDevice()
Disable device (ENABLE pin low); low-power state.
Definition max22200.ipp:528
DriverStatus SetDeviceEnable(bool enable)
Set ENABLE pin state (true = on, false = off)
Definition max22200.ipp:533
~MAX22200()
Destructor — calls Deinitialize() if initialized.
Definition max22200.ipp:36
DriverStatus WriteRegister8(uint8_t bank, uint8_t value)
Write 8-bit MSB of a register (fast 8-bit mode)
Definition max22200.ipp:575
DriverStatistics GetStatistics() const
Get accumulated driver transfer statistics.
Definition max22200.ipp:589
void SetBoardConfig(const BoardConfig &config)
Set board configuration (IFS, max current, max duty)
Definition max22200.ipp:816
bool IsInitialized() const
Check if driver completed Initialize() successfully.
Definition max22200.ipp:158
DriverStatus GetFaultPinState(bool &fault_active) const
Read nFAULT pin state (true = fault active, false = no fault)
Definition max22200.ipp:544
DriverStatus EnableDevice()
Enable device (ENABLE pin high); SPI and channels can be used.
Definition max22200.ipp:523
DriverStatus SetFullBridgeState(uint8_t pair_index, FullBridgeState state)
Set full-bridge state for a channel pair (datasheet Table 7)
Definition max22200.ipp:319
DriverStatus SetHoldDutyPercent(uint8_t channel, float percent)
Set HOLD duty cycle in percent (VDR mode)
Definition max22200.ipp:1046
static DriverStatus GetDutyLimits(bool master_clock_80khz, ChopFreq chop_freq, bool slew_rate_control_enabled, DutyLimits &limits)
Get duty cycle limits (δMIN, δMAX) for a configuration.
Definition max22200.ipp:1133
DriverStatus ReadRegister32(uint8_t bank, uint32_t &value) const
Read a 32-bit register by bank address (debug/advanced)
Definition max22200.ipp:558
DriverStatus ClearChannelFaults(uint8_t channel_mask, FaultStatus *out_faults=nullptr) const
Clear fault flags for selected channels only (MAX22200A)
Definition max22200.ipp:372
void SetFaultCallback(FaultCallback callback, void *user_data)
Register a fault event callback.
Definition max22200.ipp:631
DriverStatus ReadFaultFlags(StatusConfig &status) const
Read fault flags from STATUS register (byte 0, bits 7:1)
Definition max22200.ipp:404
DriverStatus Deinitialize()
Deinitialize — disable channels, ACTIVE=0, ENABLE low.
Definition max22200.ipp:136
DriverStatus ClearAllFaults()
Clear all fault flags (read FAULT register and discard)
Definition max22200.ipp:366
DriverStatus SetHoldCurrentA(uint8_t channel, float amps)
Set HOLD current in Amps (CDR mode)
Definition max22200.ipp:888
DriverStatus GetHitCurrentMa(uint8_t channel, uint32_t &ma) const
Get HIT current in milliamps (CDR mode)
Definition max22200.ipp:923
DriverStatus GetChannelConfig(uint8_t channel, ChannelConfig &config) const
Read a channel's configuration.
Definition max22200.ipp:223
DriverStatus WriteDpmConfig(const DpmConfig &config)
Write DPM algorithm configuration (CFG_DPM register)
Definition max22200.ipp:431
DriverStatus ConfigureAllChannels(const ChannelConfigArray &configs)
Configure all eight channels (CFG_CH0 through CFG_CH7)
Definition max22200.ipp:241
DriverStatus GetAllChannelConfigs(ChannelConfigArray &configs) const
Read configuration for all eight channels.
Definition max22200.ipp:254
DriverStatus DisableAllChannels()
Turn off all channels.
Definition max22200.ipp:300
DriverStatus WriteStatus(const StatusConfig &status)
Write the STATUS register (writable bits only)
Definition max22200.ipp:182
DriverStatus SetHoldCurrentPercent(uint8_t channel, float percent)
Set HOLD current as percentage of IFS (CDR mode)
Definition max22200.ipp:909
DriverStatus GetHoldDutyPercent(uint8_t channel, float &percent) const
Get HOLD duty cycle in percent (VDR mode)
Definition max22200.ipp:1100
DriverStatus ConfigureDpm(float start_current_ma, float dip_threshold_ma, float debounce_ms)
Configure DPM in real units (easy API)
Definition max22200.ipp:458
DriverStatus SetHitCurrentA(uint8_t channel, float amps)
Set HIT current in Amps (CDR mode)
Definition max22200.ipp:883
DriverStatus ReadDpmConfig(DpmConfig &config) const
Read DPM algorithm configuration (CFG_DPM register)
Definition max22200.ipp:420
DriverStatus DisableChannel(uint8_t channel)
Turn off a channel (set ONCHx = 0)
Definition max22200.ipp:276
void ResetStatistics()
Reset all statistics counters to zero.
Definition max22200.ipp:594
DriverStatus SetHitCurrentMa(uint8_t channel, uint32_t ma)
Set HIT current in milliamps (CDR mode)
Definition max22200.ipp:830
DriverStatus SetChannelsOn(uint8_t channel_mask)
Set which channels are on (fast multi-channel update)
Definition max22200.ipp:311
BoardConfig GetBoardConfig() const
Get current board configuration.
Definition max22200.ipp:821
DriverStatus WriteRegister32(uint8_t bank, uint32_t value)
Write a 32-bit register by bank address (debug/advanced)
Definition max22200.ipp:564
DriverStatus SetHitDutyPercent(uint8_t channel, float percent)
Set HIT duty cycle in percent (VDR mode)
Definition max22200.ipp:1007
MAX22200(SpiType &spi_interface)
Constructor (SPI only; set board config later with SetBoardConfig())
Definition max22200.ipp:22
DriverStatus ReadFaultRegisterSelectiveClear(uint8_t ocp_mask, uint8_t hhf_mask, uint8_t olf_mask, uint8_t dpm_mask, FaultStatus &faults) const
[Advanced] Read FAULT register with per-type selective clear (MAX22200A)
Definition max22200.ipp:384
DriverStatus ConfigureChannelCdr(uint8_t channel, uint32_t hit_ma, uint32_t hold_ma, float hit_time_ms, SideMode side_mode=SideMode::LOW_SIDE, ChopFreq chop_freq=ChopFreq::FMAIN_DIV4, bool slew_rate_control_enabled=false, bool open_load_detection_enabled=false, bool plunger_movement_detection_enabled=false, bool hit_current_check_enabled=false)
Configure channel in real units (CDR mode)
Definition max22200.ipp:1237
DriverStatus SetDpmEnabledChannels(uint8_t channel_mask)
Enable or disable DPM (plunger movement detection) on selected channels.
Definition max22200.ipp:438
DriverStatus GetHoldCurrentMa(uint8_t channel, uint32_t &ma) const
Get HOLD current in milliamps (CDR mode)
Definition max22200.ipp:941
DriverStatus GetHitDutyPercent(uint8_t channel, float &percent) const
Get HIT duty cycle in percent (VDR mode)
Definition max22200.ipp:1081
DriverStatus EnableChannel(uint8_t channel)
Turn on a channel (set ONCHx = 1)
Definition max22200.ipp:271
DriverStatus GetHoldCurrentPercent(uint8_t channel, float &percent) const
Get HOLD current as percentage of IFS (CDR mode)
Definition max22200.ipp:981
DriverStatus SetHoldCurrentMa(uint8_t channel, uint32_t ma)
Set HOLD current in milliamps (CDR mode)
Definition max22200.ipp:857
DriverStatus ConfigureChannel(uint8_t channel, const ChannelConfig &config)
Configure a channel (write full 32-bit CFG_CHx register)
Definition max22200.ipp:196
DriverStatus GetHitTimeMs(uint8_t channel, float &ms) const
Get HIT time in milliseconds.
Definition max22200.ipp:1215
void SetStateChangeCallback(StateChangeCallback callback, void *user_data)
Register a channel state-change callback (stored for application use)
Definition max22200.ipp:638
DriverStatus GetHitCurrentPercent(uint8_t channel, float &percent) const
Get HIT current as percentage of IFS (CDR mode)
Definition max22200.ipp:959
DriverStatus SetHitCurrentPercent(uint8_t channel, float percent)
Set HIT current as percentage of IFS (CDR mode)
Definition max22200.ipp:893
DriverStatus SetHitTimeMs(uint8_t channel, float ms)
Set HIT time in milliseconds.
Definition max22200.ipp:1187
DriverStatus Initialize()
Initialize the driver per datasheet flowchart (Figure 6)
Definition max22200.ipp:47
DriverStatus ReadFaultRegister(FaultStatus &faults) const
Read per-channel fault register (FAULT)
Definition max22200.ipp:354
DriverStatus ClearFaultFlags()
Clear STATUS fault flags by reading the STATUS register.
Definition max22200.ipp:409
DriverStatus SetAllChannelsEnabled(bool enable)
Set all channels on or off at once (convenience when toggling from a variable)
Definition max22200.ipp:305
DriverStatus ConfigureChannelVdr(uint8_t channel, float hit_duty_percent, float hold_duty_percent, float hit_time_ms, SideMode side_mode=SideMode::LOW_SIDE, ChopFreq chop_freq=ChopFreq::FMAIN_DIV4, bool slew_rate_control_enabled=false, bool open_load_detection_enabled=false, bool plunger_movement_detection_enabled=false, bool hit_current_check_enabled=false)
Configure channel in real units (VDR mode)
Definition max22200.ipp:1273
uint8_t GetLastFaultByte() const
Get last fault flags byte received from Command Register write.
Definition max22200.ipp:580
DriverStatus EnableAllChannels()
Turn on all channels.
Definition max22200.ipp:295
DriverStatus ReadStatus(StatusConfig &status) const
Read the full 32-bit STATUS register.
Definition max22200.ipp:167
constexpr uint32_t DPM_EN_BIT
DPM_EN bit (0=disabled, 1=enabled)
Definition max22200_registers.hpp:408
constexpr uint32_t FREQ_CFG_SHIFT
FREQ_CFG bit shift.
Definition max22200_registers.hpp:398
constexpr uint8_t build(uint8_t bank, bool write, bool mode8=false)
Build a Command Register value.
Definition max22200_registers.hpp:187
constexpr uint8_t STATUS
Status register (32-bit) — channel on/off, HW config, faults, ACTIVE.
Definition max22200_registers.hpp:110
constexpr uint8_t FAULT
Fault register (32-bit, read-only) — per-channel fault flags.
Definition max22200_registers.hpp:119
constexpr uint8_t CFG_DPM
DPM configuration register (32-bit) — global DPM algorithm settings.
Definition max22200_registers.hpp:120
constexpr uint8_t FAULT_BYTE_COMER
Fault byte value returned on SDO when COMER is set (per datasheet Figure 6)
Definition max22200_registers.hpp:266
Definition max22200.hpp:78
constexpr uint32_t ENABLE_TIME_US_
Enable time tEN: ENABLE rising edge to SPI ready (us)
Definition max22200_registers.hpp:85
std::array< ChannelConfig, NUM_CHANNELS_ > ChannelConfigArray
Array type for channel configurations.
Definition max22200_types.hpp:1035
@ VDR
Voltage Drive Regulation (VDRnCDR = 1) — low-side or high-side.
@ CDR
Current Drive Regulation (VDRnCDR = 0) — low-side only.
void(*)(uint8_t channel, FaultType fault_type, void *user_data) FaultCallback
Callback function type for fault events.
Definition max22200_types.hpp:1048
SideMode
High-side / Low-side selection (HSnLS bit in CFG_CHx[6])
Definition max22200_types.hpp:123
DriverStatus
Driver operation result codes.
Definition max22200_types.hpp:985
@ INITIALIZATION_ERROR
SPI/GPIO setup or ENABLE sequencing failed during init.
@ COMMUNICATION_ERROR
SPI transfer failed or COMER fault byte (0x04) detected.
@ OK
Operation completed successfully.
@ INVALID_PARAMETER
Channel index, IFS, or unit conversion argument out of range.
FullBridgeState
Full-bridge state for a channel pair (datasheet Table 7)
Definition max22200_types.hpp:973
@ Forward
ONCHx=1, ONCHy=0 — forward (control from CFG_CHy)
@ Reverse
ONCHx=0, ONCHy=1 — reverse (control from CFG_CHx)
@ Brake
ONCHx=1, ONCHy=1 — brake (both outputs driven to GND)
@ HiZ
ONCHx=0, ONCHy=0 — high impedance (both switches off)
uint32_t getChopFreqKhz(bool master_clock_80khz, ChopFreq cf)
Get chopping frequency in kHz for conversion (FREQM + FREQ_CFG)
Definition max22200_types.hpp:224
constexpr uint32_t WAKE_UP_TIME_US_
Wake-up time tWU: ACTIVE = 1 to normal operation, outputs active (us)
Definition max22200_registers.hpp:93
@ HHF
HIT current not reached (HHF)
@ OCP
Overcurrent protection (OCP)
@ UVM
Undervoltage lockout (UVM, from STATUS)
@ OVT
Overtemperature (OVT, from STATUS)
@ OLF
Open-load detection (OLF)
@ DPM
Detection of plunger movement (DPM)
@ COMER
Communication error (COMER, from STATUS)
constexpr uint32_t MAX_SPI_FREQ_STANDALONE_
Maximum SPI clock frequency without daisy chaining (Hz)
Definition max22200_registers.hpp:70
void(*)(uint8_t channel, ChannelState old_state, ChannelState new_state, void *user_data) StateChangeCallback
Callback function type for channel state changes.
Definition max22200_types.hpp:1061
constexpr uint8_t getChannelCfgBank(uint8_t channel)
Get channel configuration register bank address.
Definition max22200_registers.hpp:550
GpioSignal
Abstract signal level for control pins.
Definition max22200_spi_interface.hpp:85
@ ACTIVE
Pin function asserted (ENABLE on, CMD high, fault present on FAULT)
float getChopFreqKhzExact(bool master_clock_80khz, ChopFreq cf)
Exact chopping frequency in kHz (FREQM + FREQ_CFG, datasheet Table 1)
Definition max22200_types.hpp:240
ChopFreq
Chopping frequency setting (FREQ_CFG bits in CFG_CHx[5:4])
Definition max22200_types.hpp:211
@ FMAIN_DIV2
FreqMain / 2 (fCHOP = 50kHz if FREQM=0, 40kHz if FREQM=1). With SRC=1 use only if FREQM=1 (40kHz).
@ FMAIN
FreqMain (fCHOP = 100kHz if FREQM=0, 80kHz if FREQM=1). Not valid with SRC=1.
@ FMAIN_DIV4
FreqMain / 4 (fCHOP = 25kHz if FREQM=0, 20kHz if FREQM=1). Valid with SRC=1.
@ FMAIN_DIV3
FreqMain / 3 (fCHOP = 33.33kHz if FREQM=0, 26.66kHz if FREQM=1). Valid with SRC=1.
constexpr uint8_t NUM_CHANNELS_
Number of channels on the MAX22200.
Definition max22200_registers.hpp:60
float getMaxHitTimeMs(bool master_clock_80khz, ChopFreq cf)
Maximum representable HIT time in ms for raw values 1–254 (255 = continuous).
Definition max22200_types.hpp:313
@ FAULT
nFAULT pin — active-low open-drain fault output (read via GpioRead)
@ CMD
CMD pin — ACTIVE = Command Register phase; INACTIVE = data phase.
@ ENABLE
ENABLE pin — active-high; device sleep when INACTIVE.
Board/scale configuration for unit-based APIs.
Definition max22200_types.hpp:1089
Channel configuration structure.
Definition max22200_types.hpp:402
float hold_setpoint
HOLD setpoint: CDR = mA, VDR = duty % (0–100)
Definition max22200_types.hpp:407
bool open_load_detection_enabled
Open-load detection enable.
Definition max22200_types.hpp:421
void fromRegister(uint32_t val, uint32_t board_ifs_ma, bool master_clock_80khz_param)
Parse a 32-bit register value into user units.
Definition max22200_types.hpp:566
uint32_t toRegister(uint32_t board_ifs_ma=0, bool master_clock_80khz=false) const
Build 32-bit register value from user units.
Definition max22200_types.hpp:497
bool hit_current_check_enabled
HIT current check enable (HHF fault if IHIT not reached)
Definition max22200_types.hpp:423
float hit_time_ms
Definition max22200_types.hpp:408
SideMode side_mode
Side mode: LOW_SIDE (CDR/VDR) or HIGH_SIDE (VDR only)
Definition max22200_types.hpp:418
bool plunger_movement_detection_enabled
Plunger movement detection enable (low-side only)
Definition max22200_types.hpp:422
bool slew_rate_control_enabled
Slew rate control enable; reduces EMI; fCHOP < 50 kHz.
Definition max22200_types.hpp:420
DriveMode drive_mode
Drive mode: CDR (current) or VDR (voltage)
Definition max22200_types.hpp:417
float hit_setpoint
HIT setpoint: CDR = mA, VDR = duty % (0–100)
Definition max22200_types.hpp:406
ChopFreq chop_freq
Chopping frequency divider (FREQ_CFG[1:0])
Definition max22200_types.hpp:419
DPM (Detection of Plunger Movement) algorithm configuration.
Definition max22200_types.hpp:940
uint8_t plunger_movement_start_current
DPM_ISTART (0-127) — starting current for dip search.
Definition max22200_types.hpp:941
uint32_t toRegister() const
Encode writable CFG_DPM fields to a 32-bit register value.
Definition max22200_types.hpp:949
uint8_t plunger_movement_debounce_time
DPM_TDEB (0-15) — min dip duration in chopping periods.
Definition max22200_types.hpp:942
uint8_t plunger_movement_current_threshold
DPM_IPTH (0-15) — min dip amplitude threshold.
Definition max22200_types.hpp:943
void fromRegister(uint32_t val)
Parse a 32-bit CFG_DPM register value.
Definition max22200_types.hpp:956
Driver runtime statistics.
Definition max22200_types.hpp:1165
Duty cycle limits (δMIN, δMAX) for a given configuration.
Definition max22200_types.hpp:1136
uint8_t max_percent
Maximum duty cycle in percent (δMAX)
Definition max22200_types.hpp:1138
uint8_t min_percent
Minimum duty cycle in percent (δMIN)
Definition max22200_types.hpp:1137
Per-channel fault information from FAULT register (0x09)
Definition max22200_types.hpp:859
uint8_t overcurrent_channel_mask
OCP per-channel bitmask (bit N = channel N)
Definition max22200_types.hpp:860
uint8_t plunger_movement_fault_channel_mask
DPM per-channel bitmask (bit N = channel N)
Definition max22200_types.hpp:863
void fromRegister(uint32_t val)
Parse a 32-bit FAULT register value into per-channel bitmasks.
Definition max22200_types.hpp:872
uint8_t open_load_fault_channel_mask
OLF per-channel bitmask (bit N = channel N)
Definition max22200_types.hpp:862
uint8_t hit_not_reached_channel_mask
HHF per-channel bitmask (bit N = channel N)
Definition max22200_types.hpp:861
STATUS register structure.
Definition max22200_types.hpp:683
void fromRegister(uint32_t val)
Parse a 32-bit STATUS register value into this structure.
Definition max22200_types.hpp:760
bool communication_error_masked
COMER mask (default=true); when true COMER does not assert FAULT pin.
Definition max22200_types.hpp:695
bool undervoltage
UVM fault flag (read-only); clear by reading STATUS at init.
Definition max22200_types.hpp:715
uint8_t channels_on_mask
Definition max22200_types.hpp:685
uint32_t toRegister() const
Build 32-bit STATUS register value from writable fields.
Definition max22200_types.hpp:737
bool active
Global enable (0=low-power, 1=normal); set to 1 during init.
Definition max22200_types.hpp:706