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HardFOC driver

TLE92466ED Driver

A C++20 driver for the Infineon TLE92466ED six-channel low-side solenoid driver. It brings the chip up, configures current control, PWM and dither per channel, regulates solenoid and valve currents and reads back feedback and diagnostics, on any MCU with an SPI bus.

Quickstart API guide Source on GitHub

The driver has no platform code. You give it a small class that moves 32-bit SPI frames and sets three pins; it does the rest: frame encoding with the CRC byte, the one-frame reply pipeline, reply validation, current scaling and fault decoding.

Six-channel low-side solenoid driver TLE92466ED Infineon
Outputs
Six low-side channels, integrated MOSFETs (RDS(on) 115 mΩ) and shunts (140 mΩ)
Current control
15-bit setpoint, 0 to 1.5 A per channel (1.8 A with dither), 2.7 A in a parallel pair
Host interface
SPI mode 1 up to 8 MHz, 32-bit frames with CRC-8 SAE J1850, SPI watchdog
Supplies
VDD 4.5 V to 5.5 V, VBAT 6 V to 18 V (4 V to 38 V extended), VIO 3.0 V to 5.5 V
Control pins
RESN, EN, DRV0, DRV1, CLK (inputs), FAULTN (open-drain output)
Package
PG-DSO-36, TJ −40 °C to 150 °C (175 °C extended), AEC-Q100 Grade 0

Datasheet · Evaluation kit user manual

What you get

  • One object per chip. tle92466ed::Driver<YourPort> covers the whole chip: modes, channel setup, current setpoints, PWM, dither, feedback, diagnostics and raw registers. See the API guide.
  • Current in milliamperes. SetCurrentSetpoint(Channel::CH0, 500) writes the 15-bit TARGET with the datasheet's scaling, single or parallel. See Current control.
  • A careful SPI transport. Every access is self-synchronising (flush, command, dummy), every reply is checked for CRC and width, and critical-fault frames are decoded. See SPI protocol.
  • Diagnostics you can act on. Supplies, temperature, open load, short to ground and over-current per channel, in one FaultReport. See Diagnostics and faults.
  • Zero-overhead portability. The port is a CRTP class: no virtual calls, no heap, no exceptions, no RTOS dependency. See Porting.
  • Tested without hardware. Host unit tests run the driver against a register model of the chip's SPI. See Testing and CI.

Where to go next

  • Quickstart

    Wire the chip, write the port, regulate a coil current in about 15 lines.

  • Hardware

    Pins, supplies, bus settings and timing, the evaluation kit.

  • Architecture

    The three layers and what each one owns.

  • API guide

    Configure, drive, read and handle faults, task by task.

  • Porting

    Implement the SPI interface for your MCU.

  • API reference

    Every class and member, generated from the headers.