tle92466ed_spi_interface.hpp File Reference

Communication Interface base class for TLE92466ED driver. More...

#include <cstdarg>
#include <cstdint>
#include <span>
#include "tle92466ed_expected.hpp"
#include "tle92466ed_registers.hpp"

Go to the source code of this file.

Classes
struct	tle92466ed::SPIConfig
	SPI transaction configuration. More...
union	tle92466ed::SPIFrame
	32-bit SPI frame structure for TLE92466ED communication More...
struct	tle92466ed::CriticalFaultFlags
	Helper structure for critical fault frame flags. More...
class	tle92466ed::SpiInterface< Derived >
	CRTP-based Communication Interface template class. More...

Namespaces
namespace	tle92466ed

Typedefs
template<typename T >
using	tle92466ed::CommResult = tle::expected< T, CommError >
	Result type for communication interface operations.

Enumerations
enum class	tle92466ed::CommError : uint8_t {   tle92466ed::None = 0 , tle92466ed::BusError , tle92466ed::Timeout , tle92466ed::InvalidParameter ,   tle92466ed::TransferError , tle92466ed::HardwareNotReady , tle92466ed::BufferOverflow , tle92466ed::CRCError ,   tle92466ed::NoReply , tle92466ed::UnknownError }
	Error codes for communication interface operations. More...
enum class	tle92466ed::CtrlPin : uint8_t { tle92466ed::RESN , tle92466ed::EN , tle92466ed::FAULTN }
	Control pin enumeration for TLE92466ED. More...
enum class	tle92466ed::GpioSignal : uint8_t { tle92466ed::INACTIVE = 0 , tle92466ed::ACTIVE = 1 }
	GPIO signal states with board-agnostic naming. More...
enum class	tle92466ed::LogLevel : uint8_t {   tle92466ed::Error = 0 , tle92466ed::Warn , tle92466ed::Info , tle92466ed::Debug ,   tle92466ed::Verbose }
	Log severity levels for driver logging. More...
enum class	tle92466ed::ReplyMode : uint8_t { tle92466ed::REPLY_16BIT = 0b00 , tle92466ed::REPLY_22BIT = 0b01 , tle92466ed::CRITICAL_FAULT = 0b10 , tle92466ed::RESERVED = 0b11 }
	SPI Reply Mode enumeration. More...
enum class	tle92466ed::SPIStatus : uint8_t {   tle92466ed::NO_ERROR = 0b00000 , tle92466ed::SPI_FRAME_ERROR = 0b00001 , tle92466ed::CRC_ERROR = 0b00010 , tle92466ed::WRITE_RO_REG = 0b00011 ,   tle92466ed::INTERNAL_BUS_FAULT = 0b00100 }
	SPI Status codes. More...

Detailed Description

Communication Interface base class for TLE92466ED driver.

Copyright

Copyright (c) 2024-2025 HardFOC. All rights reserved.

This file defines the hardware abstraction layer (CRTP SpiInterface) for the TLE92466ED Six-Channel Low-Side Solenoid Driver IC. Platform adapters inherit from SpiInterface<Derived> and implement the required transfer and GPIO hooks.

Pipelined SPI reads: register reads are a two-frame protocol. Frame 1 sends the read command; the chip latches the reply and presents it on MISO during frame 2 (a dummy transfer of the same address). Read() and Write() issue both frames through TransferMulti() so CS stays asserted and the bus stays owned across the pair. The dummy is a read of address 0; repeating the accessed address instead makes the part reply with a reserved reply-mode and identity never validates (bench 2026-08-12). On a shared multi-slave bus, an adapter that deasserts CS or releases the bus between the two frames allows another device's transaction to consume the pipeline slot — reads then return zeros or another slave's data.

The TLE92466ED uses 32-bit SPI communication with the following structure:

• MOSI: 32-bit frame (CRC[31:24] + Address[23:17] + R/W[16] + Data[15:0])
• MISO: 32-bit frame (CRC[31:24] + ReplyMode[23:22] + Status[21:17] + R/W[16] + Data[15:0])
• CS: Chip select (active low)
• SCLK: Serial clock (f_SCK up to 8 MHz, datasheet 5.1.4 Table 18)
• CRC: SAE J1850 8-bit CRC