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| CommResult< void > | Init () noexcept |
| | Initialize the hardware interface.
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| CommResult< void > | Deinit () noexcept |
| | Deinitialize the hardware interface.
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| CommResult< uint32_t > | Transfer32 (uint32_t tx_data) noexcept |
| | Transfer 32-bit data via SPI (full-duplex)
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| CommResult< void > | TransferMulti (std::span< const uint32_t > tx_data, std::span< uint32_t > rx_data) noexcept |
| | Transfer multiple 32-bit words via SPI in one CS assertion window.
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| CommResult< void > | Delay (uint32_t microseconds) noexcept |
| | Delay for specified duration.
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| CommResult< void > | Configure (const SPIConfig &config) noexcept |
| | Configure SPI parameters.
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| bool | IsReady () const noexcept |
| | Check if hardware is ready for communication.
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| CommError | GetLastError () const noexcept |
| | Get the last error that occurred.
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| CommResult< void > | ClearErrors () noexcept |
| | Clear any pending errors.
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| CommResult< void > | GpioSet (CtrlPin pin, GpioSignal signal) noexcept |
| | Set GPIO control pin signal state (output control).
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| CommResult< GpioSignal > | GpioRead (CtrlPin pin) noexcept |
| | Read GPIO control pin signal state (input state).
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| CommResult< void > | GpioSetActive (CtrlPin pin) noexcept |
| | Set GPIO pin to active state (convenience method).
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| CommResult< void > | GpioSetInactive (CtrlPin pin) noexcept |
| | Set GPIO pin to inactive state (convenience method).
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| void | Log (LogLevel level, const char *tag, const char *format,...) noexcept |
| | Log a message with specified severity level and tag.
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| CommResult< uint32_t > | Read (uint16_t address, bool verify_crc=true) noexcept |
| | Read a register from the TLE92466ED (High-Level API)
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| CommResult< void > | ReadMulti (std::span< const uint16_t > addresses, std::span< uint32_t > values, uint16_t &valid_mask) noexcept |
| | Read several registers in ONE pipelined chain.
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| CommResult< void > | Write (uint16_t address, uint16_t value, bool verify_crc=true) noexcept |
| | Write a register to the TLE92466ED (High-Level API)
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| uint8_t | LastCriticalFaultFlags () const noexcept |
| | Fault byte from the most recent critical-fault reply frame.
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| bool | SawCriticalFault () const noexcept |
| | True once a critical-fault reply frame has been decoded.
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| | SpiInterface (const SpiInterface &)=delete |
| | Prevent copying.
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| SpiInterface & | operator= (const SpiInterface &)=delete |
| |
template<typename Derived>
class tle92466ed::SpiInterface< Derived >
CRTP-based Communication Interface template class.
This template class provides a hardware-agnostic interface for SPI communication using the CRTP (Curiously Recurring Template Pattern) for compile-time polymorphism. Platform-specific implementations should inherit from this template with themselves as the template parameter.
Benefits of CRTP:
- Compile-time polymorphism (no virtual function overhead)
- Static dispatch instead of dynamic dispatch
- Better optimization opportunities for the compiler
The CommInterface uses modern C++20/23 features including:
- Concepts for compile-time constraints
- std::span for safe array access
- std::expected for error handling
- uint32_t for time management (microseconds)
- 32-Bit SPI Communication:
- The TLE92466ED requires 32-bit SPI frames. Implementations must:
- Transfer 4 bytes (32 bits) per transaction
- Maintain MSB-first byte order
- Support full-duplex operation
- Calculate and verify CRC-8 (SAE J1850)
- Example Implementation:
public:
uint32_t result = spi_transfer_32bit(data);
if (spi_error()) {
}
return result;
}
};
CRTP-based Communication Interface template class.
Definition tle92466ed_spi_interface.hpp:429
Expected type — holds either a value of type T or an error of type E.
Definition tle92466ed_expected.hpp:82
Wrapper for an error value (mirrors std::unexpected)
Definition tle92466ed_expected.hpp:56
- Thread Safety:
- Implementations must ensure thread-safety for multi-threaded environments.
- Hardware Requirements:
- SPI peripheral capable of 32-bit transfers (or 4x 8-bit)
- Maximum frequency: 8 MHz (f_SCK, datasheet 5.1.4 Table 18; no minimum is specified)
- CSN high for at least 600 ns between frames (t_CSN_TD)
- Support for SPI Mode 1 (CPOL=0, CPHA=1)
- CRC calculation capability (hardware or software)
- Template Parameters
-
| Derived | The derived class type (CRTP pattern) |
template<typename Derived >
Log a message with specified severity level and tag.
Platform-specific logging implementation. The driver uses this to log diagnostic information, errors, warnings, and debug messages.
- Parameters
-
| level | Log severity level |
| tag | Tag/component name for the log message (e.g., "TLE92466ED") |
| format | Format string (printf-style) |
| ... | Variable arguments for format string |
- Note
- Implementations should use platform-specific logging (e.g., ESP_LOG for ESP32)
-
The format string and arguments follow printf-style formatting
template<typename Derived >
Read several registers in ONE pipelined chain.
- Parameters
-
| [in] | addresses | Register addresses, at most kMaxPipelinedReads. |
| [out] | values | Decoded register contents, same length as addresses. Entries whose reply failed validation are left as 0. |
| [out] | valid_mask | Bit i set when values[i] is trustworthy. Never null-checked away: callers must inspect it. |
- Returns
- Success when the chain transferred; individual replies may still have been rejected, which
valid_mask reports.
The device answers each command on the NEXT CS window, so a burst of N reads needs N+2 frames — one leading dummy to absorb whatever reply was outstanding, the N commands, and one trailing dummy to clock out the last reply. Reply i therefore lands in frame i+2.
That is the whole point of this call: Read spends 3 frames per register because it opens and closes the pipeline every time, so N reads cost 3N frames. Here they cost N+2 — for the six-channel FB_DC/FB_I_AVG sweep that is 14 frames instead of 36, inside one bus-ownership window.
Replies are validated exactly as in Read (CRC plus the reply width ExpectedReplyFor defines for that address). No retry is attempted: re-running the whole burst to recover one bad frame costs more than the caller re-reading that single register with Read, and a desynchronised chain fails validation wholesale rather than returning plausible garbage.
- Warning
- The adapter's
TransferMulti must keep one bus-ownership window across the entire chain. An adapter that falls back to per-frame transfers breaks the pipeline; the reply validation will reject the results rather than let them through.
template<typename Derived >
Transfer 32-bit data via SPI (full-duplex)
Performs a full-duplex SPI transaction, simultaneously sending and receiving 32 bits of data. This is the primary communication method for the TLE92466ED.
The TLE92466ED requires 32-bit SPI frames with the following format:
- Bits [31:24]: CRC-8 (SAE J1850)
- Bits [23:17]: Register address (7 bits of 10-bit address)
- Bit [16]: R/W (1=Write, 0=Read)
- Bits [15:0]: Data (16 bits)
- Parameters
-
| [in] | tx_data | The 32-bit data to transmit |
- Returns
- CommResult<uint32_t> Received 32-bit data or error
- Return values
-
- Timing Requirements:
- CS must be asserted (low) before transfer and deasserted (high) after
- CS must be held low during entire 32-bit transfer
- CSN lead and lag time: at least 250 ns each (t_CSN_LEAD, t_CSN_LAG)
- Minimum CS inactive time between transfers: 600 ns (t_CSN_TD)
- SI sampled on the falling edge of SCK, SO shifted on the rising edge (mode 1) (datasheet 5.1.4 Table 18 and 5.2)
- Note
- Chip select (CS) management must be handled internally by this function. The implementation should assert CS before the transfer and deassert it after. CRC calculation is handled by the driver layer, not CommInterface.
