tle92466ed::SPIFrame Union Reference

32-bit SPI frame structure for TLE92466ED communication More...

#include <tle92466ed_spi_interface.hpp>

Static Public Member Functions
static constexpr SPIFrame	MakeRead (uint16_t addr) noexcept
	Construct read frame (without CRC - must be calculated separately)
static constexpr SPIFrame	MakeWrite (uint16_t addr, uint16_t data) noexcept
	Construct write frame (without CRC - must be calculated separately)

Public Attributes
uint32_t	word
	Complete 32-bit frame.
struct {
uint32_t   data: 16
	Data field [15:0]. More...
uint32_t   rw: 1
	Read/Write bit [16] (1=Write, 0=Read) More...
uint32_t   address: 7
	Register address [23:17]. More...
uint32_t   crc: 8
	CRC-8 SAE J1850 [31:24]. More...
}	tx_fields
	MOSI (Transmit) frame structure.
struct {
uint32_t   _data_low: 16
	Lower data bits [15:0] (interpretation depends on reply mode) More...
uint32_t   _field_16: 1
	Field at bit 16 (interpretation depends on reply mode) More...
uint32_t   _field_17_21: 5
	Fields at bits 21:17 (interpretation depends on reply mode) More...
uint32_t   reply_mode: 2
	Reply mode [23:22] - determines frame type. More...
uint32_t   crc: 8
	CRC-8 SAE J1850 [31:24]. More...
}	rx_common
	MISO (Receive) frame structure - common fields.
struct {
uint32_t   data: 16
	Data field [15:0]. More...
uint32_t   rw_echo: 1
	R/W bit echoed [16]. More...
uint32_t   status: 5
	Status bits [21:17]. More...
uint32_t   reply_mode: 2
	Reply mode [23:22] = 00B. More...
uint32_t   crc: 8
	CRC-8 SAE J1850 [31:24]. More...
}	rx_16bit
	MISO 16-bit Reply Frame (Reply Mode = 00B)
struct {
uint32_t   data: 22
	22-bit data [21:0] More...
uint32_t   reply_mode: 2
	Reply mode [23:22] = 01B. More...
uint32_t   crc: 8
	CRC-8 SAE J1850 [31:24]. More...
}	rx_22bit
	MISO 22-bit Reply Frame (Reply Mode = 01B)
struct {
uint32_t   fault_flags: 8
	Fault flags [7:0]. More...
uint32_t   _reserved: 8
	Reserved/Don't care [15:8]. More...
uint32_t   _reserved2: 1
	Reserved/Don't care [16]. More...
uint32_t   _reserved3: 5
	Reserved/Don't care [21:17]. More...
uint32_t   reply_mode: 2
	Reply mode [23:22] = 10B. More...
uint32_t   _dont_care: 8
	Don't care [31:24] (not CRC in fault frames) More...
}	rx_fault
	MISO Critical Fault Frame (Reply Mode = 10B)

Detailed Description

32-bit SPI frame structure for TLE92466ED communication

The TLE92466ED uses 32-bit SPI frames with the following format:

MOSI (Write) Frame:

*  Bits 31-24 | Bits 23-17 | Bit 16 | Bits 15-0
* ------------+------------+--------+-----------
*  CRC (8-bit)| Address(7) |  R/W   | Data (16)
*             |            |  1=W   |
* 

MOSI (Read) Frame:

*  Bits 31-24 | Bits 23-17 | Bit 16 | Bits 15-0
* ------------+------------+--------+-----------
*  CRC (8-bit)| Don't Care |  R/W   | Address (16-bit)
*             |            |  0=R   |
* 

Note: Full 16-bit address is placed in bits [15:0] for read operations.

MISO (Reply) Frame - 16-bit Reply (Reply Mode = 00B):

*  Bits 31-24 | Bits 23-22 | Bits 21-17 | Bit 16 | Bits 15-0
* ------------+------------+------------+--------+-----------
*  CRC (8-bit)| Reply Mode | Status (5) | R/W    | Data (16)
*             |    00B     |            | Echo   |
* 

MISO (Reply) Frame - 22-bit Reply (Reply Mode = 01B):

*  Bits 31-24 | Bits 23-22 | Bits 21-0
* ------------+------------+-----------
*  CRC (8-bit)| Reply Mode | Data (22-bit)
*             |    01B     |
* 

MISO (Reply) Frame - Critical Fault (Reply Mode = 10B):

*  Bits 31-24 | Bits 23-22 | Bits 21-8 | Bits 7-0
* ------------+------------+----------+----------
*  Don't Care | Reply Mode | Don't    | Fault
*             |    10B     | Care     | Flags
* 

Fault Flags (bits 7:0):

• Bit 7: 1V5 supply (1=OK, 0=NOT OK)
• Bit 6: 2V5 supply (1=OK, 0=NOT OK)
• Bit 5: ADC Bandgap (1=OK, 0=NOT OK)
• Bit 4: CLK_TOO_SLOW (1=YES, 0=NO)
• Bit 3: CLK_TOO_FAST (1=YES, 0=NO)
• Bit 2: DIG_CLK_TOO_SLOW (1=YES, 0=NO)
• Bit 1: DIG_CLK_TOO_FAST (1=YES, 0=NO)
• Bit 0: WD_REF_CLK (1=MISSING, 0=OK)

Member Function Documentation

MakeRead()

static constexpr SPIFrame tle92466ed::SPIFrame::MakeRead ( uint16_t  addr )

inlinestaticconstexprnoexcept

Construct read frame (without CRC - must be calculated separately)

Parameters

addr	Register address (10-bit actual address, 0x000-0x3FF)

Returns

SPIFrame configured for read operation (CRC = 0)

Read frame format per datasheet:

*  Bits 31-24 | Bits 23-17 | Bit 16 | Bits 15-0
* ------------+------------+--------+-----------
*  CRC (8-bit)| Don't Care |  R/W   | Address (7-bit)
*             |            |  0=R   |
* 

Note: read frames carry the FULL 16-bit address in bits [15:0]; bits [23:17] are don't-care (datasheet §5.2.3.2). This is deliberately different from the write frame, which has only a 7-bit address field. That asymmetry is why read-only status registers at 0x0200+ are reachable at all — they cannot be expressed in a write frame.

MakeWrite()

static constexpr SPIFrame tle92466ed::SPIFrame::MakeWrite ( uint16_t  addr, uint16_t  data  )

inlinestaticconstexprnoexcept

Construct write frame (without CRC - must be calculated separately)

Parameters

addr	Register address (10-bit actual address, 0x000-0x3FF)
data	Data word to write (16-bit)

Returns

SPIFrame configured for write operation (CRC = 0)

Write frame format per datasheet:

*  Bits 31-24 | Bits 23-17 | Bit 16 | Bits 15-0
* ------------+------------+--------+-----------
*  CRC (8-bit)| Address(7) |  R/W   | Data (16)
*             |            |  1=W   |
* 

Note: the write address field is only 7 bits wide (datasheet §5.2.3.1), so addr & 0x7F is not a truncation — every writable register on this device lives at 0x000..0x07F (central config 0x00..0x3F, channel config CH4 0x20.. through CH3 0x70..0x7E). Registers at 0x0200+ are read-only by construction: they cannot be addressed by a write frame at all.

Member Data Documentation

_data_low

uint32_t tle92466ed::SPIFrame::_data_low

Lower data bits [15:0] (interpretation depends on reply mode)

_dont_care

uint32_t tle92466ed::SPIFrame::_dont_care

Don't care [31:24] (not CRC in fault frames)

_field_16

uint32_t tle92466ed::SPIFrame::_field_16

Field at bit 16 (interpretation depends on reply mode)

_field_17_21

uint32_t tle92466ed::SPIFrame::_field_17_21

Fields at bits 21:17 (interpretation depends on reply mode)

_reserved

uint32_t tle92466ed::SPIFrame::_reserved

Reserved/Don't care [15:8].

_reserved2

uint32_t tle92466ed::SPIFrame::_reserved2

Reserved/Don't care [16].

_reserved3

uint32_t tle92466ed::SPIFrame::_reserved3

Reserved/Don't care [21:17].

address

uint32_t tle92466ed::SPIFrame::address

Register address [23:17].

crc

uint32_t tle92466ed::SPIFrame::crc

CRC-8 SAE J1850 [31:24].

data

uint32_t tle92466ed::SPIFrame::data

Data field [15:0].

22-bit data [21:0]

fault_flags

uint32_t tle92466ed::SPIFrame::fault_flags

Fault flags [7:0].

reply_mode

uint32_t tle92466ed::SPIFrame::reply_mode

Reply mode [23:22] - determines frame type.

Reply mode [23:22] = 10B.

Reply mode [23:22] = 01B.

Reply mode [23:22] = 00B.

rw

uint32_t tle92466ed::SPIFrame::rw

Read/Write bit [16] (1=Write, 0=Read)

rw_echo

uint32_t tle92466ed::SPIFrame::rw_echo

R/W bit echoed [16].

[struct]

struct { ... } tle92466ed::SPIFrame::rx_16bit

MISO 16-bit Reply Frame (Reply Mode = 00B)

[struct]

struct { ... } tle92466ed::SPIFrame::rx_22bit

MISO 22-bit Reply Frame (Reply Mode = 01B)

[struct]

struct { ... } tle92466ed::SPIFrame::rx_common

MISO (Receive) frame structure - common fields.

[struct]

struct { ... } tle92466ed::SPIFrame::rx_fault

MISO Critical Fault Frame (Reply Mode = 10B)

status

uint32_t tle92466ed::SPIFrame::status

Status bits [21:17].

[struct]

struct { ... } tle92466ed::SPIFrame::tx_fields

MOSI (Transmit) frame structure.

word

uint32_t tle92466ed::SPIFrame::word

Complete 32-bit frame.

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The documentation for this union was generated from the following file:

• inc/tle92466ed_spi_interface.hpp