tle92466ed_registers.hpp File Reference

Register definitions and bit field mappings for TLE92466ED. More...

#include <algorithm>
#include <cmath>
#include <cstddef>
#include <cstdint>

Go to the source code of this file.

Classes
struct	tle92466ed::PERIOD::PeriodConfig
	Calculate PWM period register values from desired period in microseconds. More...
struct	tle92466ed::CLK_DIV::PllConfig
struct	tle92466ed::DITHER_CLK_DIV::ClkDivConfig
	Encoded DITHER_CLK_DIV configuration. More...
struct	tle92466ed::DITHER::DitherConfig
	Dither configuration structure. More...
struct	tle92466ed::SupplyVoltages
	High-level supply-voltage snapshot returned by ReadAllSupplyVoltages(). More...
struct	tle92466ed::DitherSetup
	High-level dither configuration (Phase 4 superset of ConfigureDither). More...
struct	tle92466ed::BistResult
	Result of RunSffBist(). More...
struct	tle92466ed::PinStatus
	Snapshot returned by ReadPinStatus(). More...
struct	tle92466ed::ChannelFeedback
	High-resolution per-channel feedback snapshot (Phase 6). More...
struct	tle92466ed::SupplyMonitorSelfTestResult
	Result of RunSupplyMonitorSelfTest(). More...

Namespaces
namespace	tle92466ed
namespace	tle92466ed::CentralReg
	Central and global register addresses.
namespace	tle92466ed::DeviceID
	Device identification and version information.
namespace	tle92466ed::ChannelBase
	Per-channel register base addresses.
namespace	tle92466ed::ChannelReg
	Per-channel register offsets (add to channel base address)
namespace	tle92466ed::CH_CTRL
	CH_CTRL register bit definitions.
namespace	tle92466ed::GLOBAL_CONFIG
	GLOBAL_CONFIG register bit definitions.
namespace	tle92466ed::GLOBAL_DIAG0
	GLOBAL_DIAG0 register bit definitions.
namespace	tle92466ed::WD_RELOAD
	WD_RELOAD register bit definitions.
namespace	tle92466ed::GLOBAL_DIAG1
	GLOBAL_DIAG1 register bit definitions.
namespace	tle92466ed::DIAG_ERR_CHGR
	DIAG_ERR_CHGR bit layout and address helpers.
namespace	tle92466ed::DIAG_WARN_CHGR
	DIAG_WARN_CHGR bit layout and address helpers.
namespace	tle92466ed::GLOBAL_DIAG2
	GLOBAL_DIAG2 register bit definitions (datasheet Rev 1.2 §5.3.2.7).
namespace	tle92466ed::FB_STAT
	FB_STAT register bit definitions.
namespace	tle92466ed::SETPOINT
	SETPOINT register bit definitions (per channel)
namespace	tle92466ed::PERIOD
	PERIOD register bit definitions and helper functions.
namespace	tle92466ed::CH_CTRL_REG
	Channel CTRL register bit definitions.
namespace	tle92466ed::CH_CONFIG
	CH_CONFIG register bit definitions.
namespace	tle92466ed::CH_MODE
	Channel MODE register bit definitions.
namespace	tle92466ed::TON
	TON register bit definitions.
namespace	tle92466ed::INTEGRATOR_LIMIT
	INTEGRATOR_LIMIT register bit definitions.
namespace	tle92466ed::CTRL_INT_THRESH
	CTRL_INT_THRESH register bit definitions.
namespace	tle92466ed::CLK_DIV
	CLK_DIV bit definitions.
namespace	tle92466ed::SFF_BIST
	SFF_BIST bit definitions.
namespace	tle92466ed::PIN_STAT
	PIN_STAT bit definitions.
namespace	tle92466ed::FAULT_MASK0
	FAULT_MASK bit definitions.
namespace	tle92466ed::FAULT_MASK1
namespace	tle92466ed::FAULT_MASK2
namespace	tle92466ed::DITHER_CTRL
	DITHER_CTRL register bit definitions.
namespace	tle92466ed::DITHER_STEP
	DITHER_STEP register bit definitions.
namespace	tle92466ed::DITHER_CLK_DIV
	DITHER_CLK_DIV register bitfield definitions and helpers.
namespace	tle92466ed::DITHER
	Dither configuration helper functions.
namespace	tle92466ed::VBAT_THRESHOLD
	VBAT threshold helper functions.
namespace	tle92466ed::VOLTAGE_FEEDBACK
	Voltage feedback helper functions for FB_VOLTAGE1 and FB_VOLTAGE2.
namespace	tle92466ed::FB_IMIN_IMAX
	Decoder for the FB_IMIN_IMAX register (ChannelReg::FB_IMIN_IMAX).
namespace	tle92466ed::FB_FEEDBACK
	Per-channel averaged feedback decoders for FB_DC, FB_I_AVG, FB_VBAT.
namespace	tle92466ed::FB_I_AVG_s16
	FB_I_AVG_s16 decoder (calibration only — see the warning below).
namespace	tle92466ed::FB_INT_THRESH
	FB_INT_THRESH feedback reader.
namespace	tle92466ed::FB_PERIOD_MIN_MAX
	FB_PERIOD_MIN_MAX decoder.

Enumerations
enum class	tle92466ed::Channel : uint8_t {   tle92466ed::CH0 = 0 , tle92466ed::CH1 = 1 , tle92466ed::CH2 = 2 , tle92466ed::CH3 = 3 ,   tle92466ed::CH4 = 4 , tle92466ed::CH5 = 5 , tle92466ed::COUNT = 6 }
	Channel enumeration. More...
enum class	tle92466ed::ChannelMode : uint8_t {   tle92466ed::OFF = 0x0 , tle92466ed::ICC = 0x1 , tle92466ed::DIRECT_DRIVE_SPI = 0x2 , tle92466ed::DIRECT_DRIVE_DRV0 = 0x3 ,   tle92466ed::DIRECT_DRIVE_DRV1 = 0x4 , tle92466ed::FREE_RUN_MEAS = 0xC }
	Channel operation mode. More...
enum class	tle92466ed::SlewRate : uint8_t { tle92466ed::SLOW_1V0_US = 0 , tle92466ed::MEDIUM_2V5_US = 1 , tle92466ed::FAST_5V0_US = 2 , tle92466ed::FASTEST_10V0_US = 3 }
	Slew rate enumeration. More...
enum class	tle92466ed::DiagCurrent : uint8_t { tle92466ed::I_80UA = 0 , tle92466ed::I_190UA = 1 , tle92466ed::I_720UA = 2 , tle92466ed::I_1250UA = 3 }
	OFF-state diagnostic current. More...
enum class	tle92466ed::ParallelPair : uint8_t { tle92466ed::NONE = 0 , tle92466ed::CH0_CH3 = 1 , tle92466ed::CH1_CH2 = 2 , tle92466ed::CH4_CH5 = 3 }
	Parallel operation pairs. More...
enum class	tle92466ed::ExpectedReply : uint8_t { tle92466ed::Bits16 , tle92466ed::Bits22 }
	Reply-frame width a register is required to answer with. More...
enum class	tle92466ed::ClockSource : uint8_t { tle92466ed::InternalOscillator , tle92466ed::ExternalClockPll }
	Clock source selection for ConfigureClockSource(). More...
enum class	tle92466ed::VioLevel : uint8_t { tle92466ed::V3_3 = 0 , tle92466ed::V5_0 = 1 }
	VIO voltage-level selection for SetVioLevel(). More...
enum class	tle92466ed::OperationState : uint8_t { tle92466ed::Reset , tle92466ed::Config , tle92466ed::Mission , tle92466ed::CriticalFault }
	Coarse operational state returned by GetOperationState(). More...
enum class	tle92466ed::FastMeasureMode : uint8_t { tle92466ed::FullPeriod = 0 , tle92466ed::HalfPeriod = 1 , tle92466ed::QuarterPeriod = 2 }
	Fast-measurement mode for dither-synchronous feedback. More...
enum class	tle92466ed::MaskableFault : uint32_t {   tle92466ed::Ch0Error = (0u << 24) | (1u << 0) , tle92466ed::Ch1Error = (0u << 24) | (1u << 1) , tle92466ed::Ch2Error = (0u << 24) | (1u << 2) , tle92466ed::Ch3Error = (0u << 24) | (1u << 3) ,   tle92466ed::Ch4Error = (0u << 24) | (1u << 4) , tle92466ed::Ch5Error = (0u << 24) | (1u << 5) , tle92466ed::EnPin = (0u << 24) | (1u << 13) , tle92466ed::SupplyNokInternal = (0u << 24) | (1u << 14) ,   tle92466ed::SupplyNokExternal = (0u << 24) | (1u << 15) , tle92466ed::Ch0Warning = (1u << 24) | (1u << 0) , tle92466ed::Ch1Warning = (1u << 24) | (1u << 1) , tle92466ed::Ch2Warning = (1u << 24) | (1u << 2) ,   tle92466ed::Ch3Warning = (1u << 24) | (1u << 3) , tle92466ed::Ch4Warning = (1u << 24) | (1u << 4) , tle92466ed::Ch5Warning = (1u << 24) | (1u << 5) , tle92466ed::CentralOtWarning = (1u << 24) | (1u << 12) ,   tle92466ed::CentralOtError = (1u << 24) | (1u << 13) , tle92466ed::ClockLow = (1u << 24) | (1u << 14) , tle92466ed::VbatUv = (2u << 24) | (1u << 0) , tle92466ed::VbatOv = (2u << 24) | (1u << 1) ,   tle92466ed::VioUv = (2u << 24) | (1u << 2) , tle92466ed::VioOv = (2u << 24) | (1u << 3) , tle92466ed::VddUv = (2u << 24) | (1u << 4) , tle92466ed::VddOv = (2u << 24) | (1u << 5) ,   tle92466ed::DataErr = (2u << 24) | (1u << 14) , tle92466ed::SpiWatchdog = (2u << 24) | (1u << 15) }
	Maskable fault sources for SetFaultMask(). More...

Functions
constexpr bool	tle92466ed::DeviceID::IsValidDevice (uint16_t icvid) noexcept
	Check if ICVID value is valid for TLE92466ED.
constexpr uint8_t	tle92466ed::DeviceID::GetDeviceType (uint16_t icvid) noexcept
	Extract device type from ICVID.
constexpr uint8_t	tle92466ed::DeviceID::GetRevision (uint16_t icvid) noexcept
	Extract silicon revision from ICVID.
constexpr uint16_t	tle92466ed::CH_CTRL::ChannelMask (uint8_t channel) noexcept
	Get channel enable bit mask.
constexpr uint16_t	tle92466ed::WD_RELOAD::MaskValue (uint16_t value) noexcept
	Mask WD_TIME value to valid 11-bit range.
constexpr uint16_t	tle92466ed::DIAG_ERR_CHGR::AddressForChannel (uint8_t channel) noexcept
	Register address for the group covering a channel.
constexpr uint8_t	tle92466ed::DIAG_ERR_CHGR::YShiftForChannel (uint8_t channel) noexcept
	Bit shift (0 or 8) selecting the channel within its group.
constexpr uint16_t	tle92466ed::DIAG_ERR_CHGR::ChannelBitMask (uint8_t channel, uint8_t bit_index) noexcept
	Build a single-bit test mask for a given channel and bit index.
constexpr uint16_t	tle92466ed::DIAG_ERR_CHGR::OcClearMaskForChannel (uint8_t channel) noexcept
	Clear mask writing 1s only to the OC bit(s) of the affected channel.
constexpr uint16_t	tle92466ed::DIAG_WARN_CHGR::AddressForChannel (uint8_t channel) noexcept
	Register address for the group covering a channel.
constexpr uint8_t	tle92466ed::DIAG_WARN_CHGR::YShiftForChannel (uint8_t channel) noexcept
	Bit shift (0 or 8) selecting the channel within its group.
constexpr uint16_t	tle92466ed::DIAG_WARN_CHGR::ChannelBitMask (uint8_t channel, uint8_t bit_index) noexcept
	Build a single-bit test mask for a given channel and bit index.
constexpr uint16_t	tle92466ed::SETPOINT::CalculateTarget (uint16_t current_ma, bool parallel_mode=false) noexcept
	Calculate setpoint value for desired current.
constexpr uint16_t	tle92466ed::SETPOINT::CalculateTargetUa (uint32_t current_ua, bool parallel_mode=false) noexcept
	Calculate setpoint value for a desired current in microamperes.
constexpr uint16_t	tle92466ed::SETPOINT::CalculateCurrent (uint16_t target, bool parallel_mode=false) noexcept
	Calculate current from setpoint value.
PeriodConfig	tle92466ed::PERIOD::CalculateFromPeriodUs (float period_us) noexcept
	Calculate period configuration from desired period in microseconds.
constexpr uint16_t	tle92466ed::PERIOD::BuildRegisterValue (const PeriodConfig &config) noexcept
	Build PERIOD register value from configuration.
constexpr uint16_t	tle92466ed::CH_CTRL_REG::Build (uint8_t min_int_thresh, bool olsg_warning_enabled, bool pwm_period_calc_mode) noexcept
	Build a complete CTRL value instead of read-modify-writing it.
constexpr uint16_t	tle92466ed::TON::Build (uint16_t ton_mant, uint8_t olsg_timeout) noexcept
	Pack TON_MANT + OLSG_TIMEOUT into the raw register value.
constexpr uint16_t	tle92466ed::INTEGRATOR_LIMIT::Build (uint16_t lim_value_abs, uint8_t auto_lim_value_abs) noexcept
constexpr uint16_t	tle92466ed::CTRL_INT_THRESH::Build (uint16_t int_thresh) noexcept
	Build raw value from a 9-bit integrator threshold.
constexpr uint16_t	tle92466ed::CLK_DIV::BuildExternalPll (uint8_t pll_refdiv, uint16_t pll_fbdiv) noexcept
	Pack the external-clock PLL configuration.
PllConfig	tle92466ed::CLK_DIV::CalculatePllFromExternalHz (uint32_t f_clk_hz) noexcept
ClkDivConfig	tle92466ed::DITHER_CLK_DIV::CalculateFromTrefClkUs (float t_ref_clk_us) noexcept
	Pick MANT/EXP that approximate a desired tref_clk in microseconds.
DitherConfig	tle92466ed::DITHER::CalculateFromAmplitudeFrequency (float amplitude_ma, float frequency_hz, bool parallel_mode=false, float t_ref_clk_us=DEFAULT_T_REF_CLK_US) noexcept
	Calculate dither configuration from amplitude and frequency.
constexpr uint8_t	tle92466ed::VBAT_THRESHOLD::CalculateFromVoltage (float voltage_volts) noexcept
	Calculate register value from voltage.
constexpr float	tle92466ed::VBAT_THRESHOLD::CalculateVoltage (uint8_t register_value) noexcept
	Calculate voltage from register value.
constexpr uint16_t	tle92466ed::VOLTAGE_FEEDBACK::ExtractVioMillivolts (uint32_t register_value) noexcept
	Extract VIO voltage from FB_VOLTAGE1 register (22-bit value)
constexpr uint16_t	tle92466ed::VOLTAGE_FEEDBACK::ExtractVddMillivolts (uint32_t register_value) noexcept
	Extract VDD voltage from FB_VOLTAGE1 register (22-bit value)
constexpr uint16_t	tle92466ed::VOLTAGE_FEEDBACK::ExtractVbatMillivolts (uint32_t register_value) noexcept
	Extract VBAT voltage from FB_VOLTAGE2 register (22-bit value)
constexpr uint16_t	tle92466ed::VOLTAGE_FEEDBACK::ExtractTemperatureRaw (uint32_t register_value) noexcept
	Extract temperature value from FB_VOLTAGE2 register (22-bit value)
constexpr float	tle92466ed::VOLTAGE_FEEDBACK::TemperatureCelsiusFromRaw (uint16_t temp_value) noexcept
	Convert a raw TEMP_VALUE (11-bit) to die temperature in \u00b0C.
constexpr float	tle92466ed::VOLTAGE_FEEDBACK::TemperatureCelsiusFromFbVoltage2 (uint32_t register_value) noexcept
	Convert a raw 22-bit FB_VOLTAGE2 read to die temperature in \u00b0C.
constexpr int16_t	tle92466ed::FB_IMIN_IMAX::SignExtend10 (uint32_t v) noexcept
	Sign-extend a 10-bit two's-complement field to int16_t.
constexpr int16_t	tle92466ed::FB_IMIN_IMAX::ExtractIMin (uint32_t raw) noexcept
	Extract signed 10-bit IMIN field from raw FB_IMIN_IMAX read.
constexpr int16_t	tle92466ed::FB_IMIN_IMAX::ExtractIMax (uint32_t raw) noexcept
	Extract signed 10-bit IMAX field from raw FB_IMIN_IMAX read.
constexpr int32_t	tle92466ed::FB_IMIN_IMAX::FieldToMilliamps (int16_t field) noexcept
	Convert a signed 10-bit IMIN/IMAX field value to milliamperes.
constexpr int32_t	tle92466ed::FB_IMIN_IMAX::IMin_mA (uint32_t raw) noexcept
	Decode IMIN in mA from a raw FB_IMIN_IMAX read.
constexpr int32_t	tle92466ed::FB_IMIN_IMAX::IMax_mA (uint32_t raw) noexcept
	Decode IMAX in mA from a raw FB_IMIN_IMAX read.
constexpr int16_t	tle92466ed::FB_FEEDBACK::SignExtend11 (uint32_t v) noexcept
	Sign-extend an 11-bit two's-complement value into int16_t.
constexpr uint16_t	tle92466ed::FB_FEEDBACK::ExtractTpMant (uint32_t fb_dc_raw) noexcept
	Extract TP_MANT (Period Mantissa, 11 bits unsigned) from a raw FB_DC read.
constexpr uint16_t	tle92466ed::FB_FEEDBACK::ExtractToMant (uint32_t fb_dc_raw) noexcept
	Extract TO_MANT (On-time Mantissa, 11 bits unsigned) from a raw FB_DC read.
constexpr int16_t	tle92466ed::FB_FEEDBACK::ExtractIAvgMant (uint32_t fb_i_avg_raw) noexcept
	Extract signed I_AVG_MANT (11-bit two's-complement) from FB_I_AVG.
constexpr uint8_t	tle92466ed::FB_FEEDBACK::ExtractMeasExp (uint32_t fb_vbat_or_iavg_raw) noexcept
	Extract the 4-bit measurement exponent from FB_VBAT or FB_I_AVG.
constexpr float	tle92466ed::FB_FEEDBACK::ComputeDutyCycle (uint32_t fb_dc_raw) noexcept
	Compute duty cycle (0.0 – 1.0) from a raw FB_DC value.
constexpr bool	tle92466ed::FB_FEEDBACK::HasValidMeasurementWindow (uint32_t fb_dc_raw) noexcept
	True when FB_DC reports a measurement period usable for ratio decoding.
int32_t	tle92466ed::FB_FEEDBACK::ComputeAverageCurrent_mA (uint32_t fb_i_avg_raw, uint32_t fb_dc_raw) noexcept
	Compute average current in mA (signed) from FB_I_AVG and FB_DC.
uint32_t	tle92466ed::FB_FEEDBACK::ComputeVbatChannel_mV (uint32_t fb_vbat_raw, uint32_t fb_dc_raw) noexcept
	Compute averaged battery voltage in mV from FB_VBAT and FB_DC.
constexpr int32_t	tle92466ed::FB_I_AVG_s16::SignExtend17 (uint32_t raw17) noexcept
	Sign-extend the 17-bit signed field.
constexpr bool	tle92466ed::FB_I_AVG_s16::IsSettlingFrame (uint32_t reply_22bit) noexcept
	True when the frame is the pre-measurement placeholder.
constexpr int32_t	tle92466ed::FB_I_AVG_s16::ToMilliamps (uint32_t reply_22bit) noexcept
	Decode signed 17-bit raw to milliamps.
constexpr uint8_t	tle92466ed::FB_I_AVG_s16::ExtractTimestamp (uint32_t reply_22bit) noexcept
	Extract the 2-bit rolling timestamp.
constexpr int16_t	tle92466ed::FB_INT_THRESH::Extract (uint32_t reply_22bit) noexcept
constexpr uint32_t	tle92466ed::FB_PERIOD_MIN_MAX::ToMicroseconds (uint16_t raw_count) noexcept
	Convert a raw 10-bit count to microseconds (fSYS = 28 MHz).
constexpr uint16_t	tle92466ed::FB_PERIOD_MIN_MAX::ExtractMin (uint32_t reply_22bit) noexcept
constexpr uint16_t	tle92466ed::FB_PERIOD_MIN_MAX::ExtractMax (uint32_t reply_22bit) noexcept
constexpr uint32_t	tle92466ed::FB_PERIOD_MIN_MAX::PeriodMinMicroseconds (uint32_t reply_22bit) noexcept
constexpr uint32_t	tle92466ed::FB_PERIOD_MIN_MAX::PeriodMaxMicroseconds (uint32_t reply_22bit) noexcept
constexpr uint16_t	tle92466ed::GetChannelBase (Channel channel) noexcept
	Get channel base address.
constexpr uint16_t	tle92466ed::GetChannelRegister (Channel channel, uint16_t offset) noexcept
	Get channel register address.
constexpr ExpectedReply	tle92466ed::ExpectedReplyFor (uint16_t address) noexcept
	Reply width the device must use when answering a read of address.
constexpr uint8_t	tle92466ed::ToIndex (Channel ch) noexcept
	Convert channel to index.
const char *	tle92466ed::ToString (ChannelMode mode) noexcept
	Convert ChannelMode enum to string.
const char *	tle92466ed::ToString (SlewRate rate) noexcept
	Convert SlewRate enum to string.
const char *	tle92466ed::ToString (DiagCurrent current) noexcept
	Convert DiagCurrent enum to string.
const char *	tle92466ed::ToString (ParallelPair pair) noexcept
	Convert ParallelPair enum to string.
const char *	tle92466ed::ToString (Channel channel) noexcept
	Convert Channel enum to string.
constexpr bool	tle92466ed::IsValidChannel (Channel ch) noexcept
	Validate channel number.
constexpr uint8_t	tle92466ed::CalculateCrc8J1850 (const uint8_t *data, std::size_t length) noexcept
	Calculate SAE J1850 CRC-8.
uint8_t	tle92466ed::CalculateFrameCrc (const tle92466ed::SPIFrame &frame) noexcept
	Calculate CRC for SPI frame.
bool	tle92466ed::VerifyFrameCrc (const tle92466ed::SPIFrame &frame) noexcept
	Verify CRC in received frame.
constexpr uint8_t	tle92466ed::FaultMaskIndex (MaskableFault f) noexcept
	Extract FAULT_MASK register index (0..2) from a MaskableFault value.
constexpr uint16_t	tle92466ed::FaultMaskBit (MaskableFault f) noexcept
	Extract the bit mask within the target FAULT_MASK register.

Variables
constexpr uint16_t	tle92466ed::CentralReg::CH_CTRL = 0x0000
	Channel Control Register.
constexpr uint16_t	tle92466ed::CentralReg::GLOBAL_CONFIG = 0x0002
	Global Configuration Register.
constexpr uint16_t	tle92466ed::CentralReg::GLOBAL_DIAG0 = 0x0003
	Global Diagnosis Register 0.
constexpr uint16_t	tle92466ed::CentralReg::GLOBAL_DIAG1 = 0x0004
	Global Diagnosis Register 1.
constexpr uint16_t	tle92466ed::CentralReg::GLOBAL_DIAG2 = 0x0005
	Global Diagnosis Register 2.
constexpr uint16_t	tle92466ed::CentralReg::VBAT_TH = 0x0006
	VBAT Threshold Register.
constexpr uint16_t	tle92466ed::CentralReg::FB_FRZ = 0x0007
	Feedback Freeze Register.
constexpr uint16_t	tle92466ed::CentralReg::FB_UPD = 0x0008
	Feedback Update Register.
constexpr uint16_t	tle92466ed::CentralReg::WD_RELOAD = 0x0009
	SPI Watchdog Reload Register.
constexpr uint16_t	tle92466ed::CentralReg::DIAG_ERR_CHGR0 = 0x000A
	Diag Error CHGR0 (CH0+CH1)
constexpr uint16_t	tle92466ed::CentralReg::DIAG_ERR_CHGR1 = 0x000B
	Diag Error CHGR1 (CH2+CH3)
constexpr uint16_t	tle92466ed::CentralReg::DIAG_ERR_CHGR2 = 0x000C
	Diag Error CHGR2 (CH4+CH5)
constexpr uint16_t	tle92466ed::CentralReg::DIAG_WARN_CHGR0 = 0x0010
	Diag Warn CHGR0 (CH0+CH1)
constexpr uint16_t	tle92466ed::CentralReg::DIAG_WARN_CHGR1 = 0x0011
	Diag Warn CHGR1 (CH2+CH3)
constexpr uint16_t	tle92466ed::CentralReg::DIAG_WARN_CHGR2 = 0x0012
	Diag Warn CHGR2 (CH4+CH5)
constexpr uint16_t	tle92466ed::CentralReg::FAULT_MASK0 = 0x0016
	Fault Mask Register 0.
constexpr uint16_t	tle92466ed::CentralReg::FAULT_MASK1 = 0x0017
	Fault Mask Register 1.
constexpr uint16_t	tle92466ed::CentralReg::FAULT_MASK2 = 0x0018
	Fault Mask Register 2.
constexpr uint16_t	tle92466ed::CentralReg::CLK_DIV = 0x0019
	Clock Control Register.
constexpr uint16_t	tle92466ed::CentralReg::SFF_BIST = 0x003F
	BIST Register.
constexpr uint16_t	tle92466ed::CentralReg::ICVID = 0x0200
	IC Version and ID.
constexpr uint16_t	tle92466ed::CentralReg::PIN_STAT = 0x0201
	Pin Status Register.
constexpr uint16_t	tle92466ed::CentralReg::FB_STAT = 0x0202
	Feedback Status Register.
constexpr uint16_t	tle92466ed::CentralReg::FB_VOLTAGE1 = 0x0203
	Feedback Voltage Register 1.
constexpr uint16_t	tle92466ed::CentralReg::FB_VOLTAGE2 = 0x0204
	Feedback Voltage Register 2.
constexpr uint16_t	tle92466ed::CentralReg::CHIPID0 = 0x0205
	Unique Chip ID Register 0.
constexpr uint16_t	tle92466ed::CentralReg::CHIPID1 = 0x0206
	Unique Chip ID Register 1.
constexpr uint16_t	tle92466ed::CentralReg::CHIPID2 = 0x0207
	Unique Chip ID Register 2.
constexpr uint16_t	tle92466ed::DeviceID::DEVICE_TYPE_MASK = 0xFF00
	Device type mask [15:8].
constexpr uint16_t	tle92466ed::DeviceID::REVISION_MASK = 0x00FF
	Silicon revision mask [7:0].
constexpr uint8_t	tle92466ed::DeviceID::EXPECTED_TYPE_92466ED = 0xC1
	Expected manufacturer/type byte.
constexpr uint8_t	tle92466ed::DeviceID::MIN_REVISION = 0x00
	Minimum silicon revision.
constexpr uint16_t	tle92466ed::ChannelBase::CH0 = 0x0040
	Channel 0 base address.
constexpr uint16_t	tle92466ed::ChannelBase::CH1 = 0x0050
	Channel 1 base address.
constexpr uint16_t	tle92466ed::ChannelBase::CH2 = 0x0060
	Channel 2 base address.
constexpr uint16_t	tle92466ed::ChannelBase::CH3 = 0x0070
	Channel 3 base address.
constexpr uint16_t	tle92466ed::ChannelBase::CH4 = 0x0020
	Channel 4 base address.
constexpr uint16_t	tle92466ed::ChannelBase::CH5 = 0x0030
	Channel 5 base address.
constexpr uint16_t	tle92466ed::ChannelReg::SETPOINT = 0x0000
	Current Setpoint Register.
constexpr uint16_t	tle92466ed::ChannelReg::CTRL = 0x0001
	Control Register.
constexpr uint16_t	tle92466ed::ChannelReg::PERIOD = 0x0002
	ICC PWM Frequency Controller.
constexpr uint16_t	tle92466ed::ChannelReg::INTEGRATOR_LIMIT = 0x0003
	ICC Integrator Limitation.
constexpr uint16_t	tle92466ed::ChannelReg::DITHER_CLK_DIV = 0x0004
	Dither Clock Register.
constexpr uint16_t	tle92466ed::ChannelReg::DITHER_STEP = 0x0005
	Dither Step Register.
constexpr uint16_t	tle92466ed::ChannelReg::DITHER_CTRL = 0x0006
	Dither Control Register.
constexpr uint16_t	tle92466ed::ChannelReg::CH_CONFIG = 0x0007
	Channel Configuration.
constexpr uint16_t	tle92466ed::ChannelReg::MODE = 0x000C
	Channel Mode Register.
constexpr uint16_t	tle92466ed::ChannelReg::TON = 0x000D
	On-Time Register.
constexpr uint16_t	tle92466ed::ChannelReg::CTRL_INT_THRESH = 0x000E
	ICC Integrator Threshold.
constexpr uint16_t	tle92466ed::ChannelReg::FB_DC = 0x0200
	Feedback Duty Cycle.
constexpr uint16_t	tle92466ed::ChannelReg::FB_VBAT = 0x0201
	Feedback Average VBAT.
constexpr uint16_t	tle92466ed::ChannelReg::FB_I_AVG = 0x0202
	Feedback Average Current.
constexpr uint16_t	tle92466ed::ChannelReg::FB_IMIN_IMAX = 0x0203
	Feedback Min/Max Current.
constexpr uint16_t	tle92466ed::ChannelReg::FB_I_AVG_s16 = 0x0204
	Feedback signed Current (16-bit)
constexpr uint16_t	tle92466ed::ChannelReg::FB_INT_THRESH = 0x0205
	Feedback ICC Integrator Threshold.
constexpr uint16_t	tle92466ed::ChannelReg::FB_PERIOD_MIN_MAX = 0x0206
	Feedback Min/Max PWM Period.
constexpr uint16_t	tle92466ed::CH_CTRL::EN_CH0 = (1 << 0)
	Enable Channel 0.
constexpr uint16_t	tle92466ed::CH_CTRL::EN_CH1 = (1 << 1)
	Enable Channel 1.
constexpr uint16_t	tle92466ed::CH_CTRL::EN_CH2 = (1 << 2)
	Enable Channel 2.
constexpr uint16_t	tle92466ed::CH_CTRL::EN_CH3 = (1 << 3)
	Enable Channel 3.
constexpr uint16_t	tle92466ed::CH_CTRL::EN_CH4 = (1 << 4)
	Enable Channel 4.
constexpr uint16_t	tle92466ed::CH_CTRL::EN_CH5 = (1 << 5)
	Enable Channel 5.
constexpr uint16_t	tle92466ed::CH_CTRL::CH_PAR_4_5 = (1 << 12)
	Parallel CH4/CH5.
constexpr uint16_t	tle92466ed::CH_CTRL::CH_PAR_0_3 = (1 << 13)
	Parallel CH0/CH3.
constexpr uint16_t	tle92466ed::CH_CTRL::CH_PAR_1_2 = (1 << 14)
	Parallel CH1/CH2.
constexpr uint16_t	tle92466ed::CH_CTRL::OP_MODE = (1 << 15)
	Operation Mode.
constexpr uint16_t	tle92466ed::CH_CTRL::ALL_CH_MASK = 0x003F
	All channel bits.
constexpr uint16_t	tle92466ed::CH_CTRL::ALL_PAR_MASK = 0x7000
	All parallel bits.
constexpr uint16_t	tle92466ed::CH_CTRL::DEFAULT = 0x0000
	Default value.
constexpr uint16_t	tle92466ed::CH_CTRL::CONFIG_MODE = 0x0000
	Config Mode (OP_MODE=0)
constexpr uint16_t	tle92466ed::CH_CTRL::MISSION_MODE = OP_MODE
	Mission Mode (OP_MODE=1)
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::CLK_WD_EN = (1 << 0)
	Clock watchdog enable.
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::SPI_WD_EN = (1 << 1)
	SPI watchdog enable.
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::CRC_EN = (1 << 2)
	CRC check enable.
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::V1V5_UV_TEST = (1 << 4)
	1.5V UV test
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::V1V5_OV_TEST = (1 << 5)
	1.5V OV test
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::OT_TEST = (1 << 12)
	Over-temp test.
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::UV_OV_SWAP = (1 << 13)
	UV/OV swap test.
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::VIO_SEL = (1 << 14)
	VIO select (0=3.3V, 1=5V)
constexpr uint16_t	tle92466ed::GLOBAL_CONFIG::DEFAULT = 0x4005
	Default value.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::VBAT_UV = (1 << 0)
	VBAT undervoltage.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::VBAT_OV = (1 << 1)
	VBAT overvoltage.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::VIO_UV = (1 << 2)
	VIO undervoltage.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::VIO_OV = (1 << 3)
	VIO overvoltage.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::VDD_UV = (1 << 4)
	VDD undervoltage.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::VDD_OV = (1 << 5)
	VDD overvoltage.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::CLK_NOK = (1 << 6)
	Clock fault.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::COTERR = (1 << 7)
	Central OT error.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::COTWARN = (1 << 8)
	Central OT warning.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::RES_EVENT = (1 << 9)
	Reset event.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::POR_EVENT = (1 << 10)
	Power-on reset.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::SPI_WD_ERR = (1 << 14)
	SPI watchdog error.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::DEFAULT = 0x0600
	Default value.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::FAULT_MASK = 0x47FF
	All fault bits.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG0::CLEAR_ALL = 0xFFFF
	Clear all bits (write-to-clear)
constexpr uint16_t	tle92466ed::WD_RELOAD::WD_TIME_MASK = 0x07FF
	11-bit mask for WD_TIME field (bits 10:0)
constexpr uint16_t	tle92466ed::WD_RELOAD::WD_TIME_MAX = 0x07FF
	Maximum WD_TIME value (2047)
constexpr uint16_t	tle92466ed::WD_RELOAD::DEFAULT = 0x0001
	Default value.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::VR_IREF_UV = (1 << 0)
	Bias current UV.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::VR_IREF_OV = (1 << 1)
	Bias current OV.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::VDD2V5_UV = (1 << 2)
	2.5V supply UV
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::VDD2V5_OV = (1 << 3)
	2.5V supply OV
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::REF_UV = (1 << 4)
	Reference UV.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::REF_OV = (1 << 5)
	Reference OV.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::VPRE_OV = (1 << 6)
	Pre-reg OV.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::HVADC_ERR = (1 << 15)
	HV ADC error.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::DEFAULT = 0x0000
	Default value.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG1::CLEAR_ALL = 0xFFFF
	Clear all bits (write-to-clear)
constexpr uint8_t	tle92466ed::DIAG_ERR_CHGR::BIT_OLSG = 0
	Open-Load / Short-to-Ground.
constexpr uint8_t	tle92466ed::DIAG_ERR_CHGR::BIT_OL = 1
	Open-Load.
constexpr uint8_t	tle92466ed::DIAG_ERR_CHGR::BIT_OC = 2
	Overcurrent (double-clear)
constexpr uint8_t	tle92466ed::DIAG_ERR_CHGR::BIT_SG = 3
	Short-to-Ground.
constexpr uint8_t	tle92466ed::DIAG_ERR_CHGR::BIT_OTE = 4
	Channel overtemperature error.
constexpr uint16_t	tle92466ed::DIAG_ERR_CHGR::PER_CHANNEL_MASK = 0x001Fu
	5-bit mask of all error bits for one channel (before 8*y shift).
constexpr uint16_t	tle92466ed::DIAG_ERR_CHGR::OC_BOTH_MASK = (1u << BIT_OC) | (1u << (BIT_OC + 8))
	16-bit mask of both-channel OC bits in a group (bits 2 and 10).
constexpr uint8_t	tle92466ed::DIAG_WARN_CHGR::BIT_PWM_REG = 0
constexpr uint8_t	tle92466ed::DIAG_WARN_CHGR::BIT_I_REG = 1
constexpr uint8_t	tle92466ed::DIAG_WARN_CHGR::BIT_OTW = 2
constexpr uint8_t	tle92466ed::DIAG_WARN_CHGR::BIT_OLSG_WARN = 3
constexpr uint8_t	tle92466ed::DIAG_WARN_CHGR::BIT_OLSG_CHK_NOK = 4
constexpr uint16_t	tle92466ed::DIAG_WARN_CHGR::PER_CHANNEL_MASK = 0x001Fu
constexpr uint16_t	tle92466ed::GLOBAL_DIAG2::REG_ECC_ERR = (1 << 1)
	Multi-bit flip in a register.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG2::OTP_ECC_ERR = (1 << 3)
	Non-repairable OTP multi-bit flip.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG2::OTP_VIRGIN = (1 << 4)
	1 = virgin OTP address (must be 0)
constexpr uint16_t	tle92466ed::GLOBAL_DIAG2::DEFAULT = 0x0000
	Default value.
constexpr uint16_t	tle92466ed::GLOBAL_DIAG2::CLEAR_ALL = 0xFFFF
	Clear all bits (write-to-clear)
constexpr uint32_t	tle92466ed::FB_STAT::DIAG_WARN_CHGR0 = (1u << 0)
	DIAG_WARN_CHGR0 status.
constexpr uint32_t	tle92466ed::FB_STAT::DIAG_WARN_CHGR1 = (1u << 1)
	DIAG_WARN_CHGR1 status.
constexpr uint32_t	tle92466ed::FB_STAT::DIAG_WARN_CHGR2 = (1u << 2)
	DIAG_WARN_CHGR2 status.
constexpr uint32_t	tle92466ed::FB_STAT::OLSG_WARN_CHK_NOK_CHGR0 = (1u << 3)
	OL/SG check group 0.
constexpr uint32_t	tle92466ed::FB_STAT::OLSG_WARN_CHK_NOK_CHGR1 = (1u << 4)
	OL/SG check group 1.
constexpr uint32_t	tle92466ed::FB_STAT::OLSG_WARN_CHK_NOK_CHGR2 = (1u << 5)
	OL/SG check group 2.
constexpr uint32_t	tle92466ed::FB_STAT::CLK_NOK_STAT = (1u << 6)
	Clock fault status.
constexpr uint32_t	tle92466ed::FB_STAT::COTERR = (1u << 7)
	Central overtemperature error.
constexpr uint32_t	tle92466ed::FB_STAT::COTWARN = (1u << 8)
	Central overtemperature warning.
constexpr uint32_t	tle92466ed::FB_STAT::RES_EVENT = (1u << 9)
	Reset event (RESN pin)
constexpr uint32_t	tle92466ed::FB_STAT::POR_EVENT = (1u << 10)
	Power-on reset event.
constexpr uint32_t	tle92466ed::FB_STAT::DATA_ERR = (1u << 11)
	OTP_ECC_ERR / OTP_VIRGIN / HV_ADC_ERR.
constexpr uint32_t	tle92466ed::FB_STAT::SUP_NOK_EXT = (1u << 12)
	VIO/VDD/VBAT UV or OV.
constexpr uint32_t	tle92466ed::FB_STAT::SUP_NOK_INT = (1u << 13)
	Internal rail UV or OV.
constexpr uint32_t	tle92466ed::FB_STAT::ERR_CHGR0 = (1u << 14)
	DIAG_ERR_CHGR1 status.
constexpr uint32_t	tle92466ed::FB_STAT::ERR_CHGR1 = (1u << 15)
	DIAG_ERR_CHGR2 status.
constexpr uint32_t	tle92466ed::FB_STAT::ERR_CHGR2 = (1u << 16)
	DIAG_ERR_CHGR3 status.
constexpr uint32_t	tle92466ed::FB_STAT::SPI_WD_ERR = (1u << 20)
	SPI watchdog error status.
constexpr uint32_t	tle92466ed::FB_STAT::INIT_DONE = (1u << 21)
	Chip initialization done.
constexpr uint16_t	tle92466ed::SETPOINT::TARGET_MASK = 0x7FFF
	Target current mask.
constexpr uint16_t	tle92466ed::SETPOINT::AUTO_LIMIT_DIS = (1 << 15)
	Disable auto-limit.
constexpr uint16_t	tle92466ed::SETPOINT::DEFAULT = 0x0000
	Default (0A)
constexpr uint16_t	tle92466ed::SETPOINT::MAX_TARGET = 0x6000
	Maximum safe target value (datasheet saturates above 0x6000)
constexpr uint16_t	tle92466ed::PERIOD::MANT_MASK = 0x00FF
	Mantissa mask (bits 7:0)
constexpr uint16_t	tle92466ed::PERIOD::EXP_MASK = 0x0700
	Exponent mask (bits 10:8)
constexpr uint16_t	tle92466ed::PERIOD::EXP_SHIFT = 8
	Exponent shift.
constexpr uint8_t	tle92466ed::PERIOD::EXP_VALUE_MASK = 0x07
	Exponent value mask (3 bits: 0-7)
constexpr uint16_t	tle92466ed::PERIOD::LOW_FREQ_BIT = (1 << 11)
	Low frequency range bit.
constexpr uint16_t	tle92466ed::PERIOD::PWM_CTRL_PARAM_SHIFT = 12
constexpr uint16_t	tle92466ed::PERIOD::PWM_CTRL_PARAM_MASK = 0xF000
constexpr uint32_t	tle92466ed::PERIOD::F_SYS_HZ = 28'000'000UL
	System clock frequency (28 MHz)
constexpr float	tle92466ed::PERIOD::F_SYS_PERIOD_US = 1.0F / 28.0F
	System clock period (≈35.71 ns)
constexpr float	tle92466ed::PERIOD::kSpecMinFrequency_Hz = 110.0F
	Datasheet minimum f_PWM.
constexpr float	tle92466ed::PERIOD::kSpecMaxFrequency_Hz = 4000.0F
	Datasheet maximum f_PWM.
constexpr float	tle92466ed::PERIOD::kSpecMinPeriod_us = 1.0e6F / kSpecMaxFrequency_Hz
	250 µs
constexpr float	tle92466ed::PERIOD::kSpecMaxPeriod_us = 1.0e6F / kSpecMinFrequency_Hz
	9090.9 µs
constexpr float	tle92466ed::PERIOD::kSpecLowRangeMinFreq_Hz = kSpecMinFrequency_Hz / 8.0F
	13.75 Hz
constexpr float	tle92466ed::PERIOD::kSpecLowRangeMaxFreq_Hz = kSpecMaxFrequency_Hz / 8.0F
	500 Hz
constexpr float	tle92466ed::PERIOD::kSpecLowRangeMinPeriod_us
	2000 µs
constexpr float	tle92466ed::PERIOD::kSpecLowRangeMaxPeriod_us
	72727 µs
constexpr float	tle92466ed::PERIOD::kSpecCombinedMinPeriod_us = kSpecMinPeriod_us
	Combined min period across both ranges (250 µs).
constexpr float	tle92466ed::PERIOD::kSpecCombinedMaxPeriod_us = kSpecLowRangeMaxPeriod_us
	Combined max period across both ranges (low-range 72.7 ms).
constexpr uint16_t	tle92466ed::CH_CTRL_REG::MIN_INT_THRESH_MASK = 0x00FF
	Min threshold mask.
constexpr uint16_t	tle92466ed::CH_CTRL_REG::PWM_PERIOD_CALC_MODE = (1 << 8)
	PWM calc mode.
constexpr uint16_t	tle92466ed::CH_CTRL_REG::OLSG_WARN_WINDOW_MASK = 0x3E00
	OLSG window mask.
constexpr uint16_t	tle92466ed::CH_CTRL_REG::OLSG_WARN_WINDOW_SHIFT = 9
	OLSG window shift.
constexpr uint16_t	tle92466ed::CH_CTRL_REG::OLSG_WARN_EN = (1 << 14)
	OLSG warn enable.
constexpr uint16_t	tle92466ed::CH_CTRL_REG::DEFAULT = 0x4600
	POR: OLSG_WARN_EN, window 3, MIN_INT_THRESH 0.
constexpr uint16_t	tle92466ed::CH_CTRL_REG::DEFAULT_OLSG_WARN_WINDOW = 3u
	OLSG warning window encoded in the POR value, preserved when rebuilding.
constexpr uint8_t	tle92466ed::CH_CTRL_REG::MIN_INT_THRESH_FLOOR = 2u
	Smallest MIN_INT_THRESH that keeps the ICC power stage switching.
constexpr uint8_t	tle92466ed::CH_CTRL_REG::MIN_INT_THRESH_CEIL = 12u
	Largest MIN_INT_THRESH compatible with the Autolimit constraint.
constexpr uint16_t	tle92466ed::CH_CONFIG::SLEWR_1V0_US = 0b00
	1.0 V/µs
constexpr uint16_t	tle92466ed::CH_CONFIG::SLEWR_2V5_US = 0b01
	2.5 V/µs
constexpr uint16_t	tle92466ed::CH_CONFIG::SLEWR_5V0_US = 0b10
	5.0 V/µs
constexpr uint16_t	tle92466ed::CH_CONFIG::SLEWR_10V0_US = 0b11
	10.0 V/µs
constexpr uint16_t	tle92466ed::CH_CONFIG::SLEWR_MASK = 0x0003
	Slew rate mask.
constexpr uint16_t	tle92466ed::CH_CONFIG::I_DIAG_80UA = (0 << 2)
	80 µA
constexpr uint16_t	tle92466ed::CH_CONFIG::I_DIAG_190UA = (1 << 2)
	190 µA
constexpr uint16_t	tle92466ed::CH_CONFIG::I_DIAG_720UA = (2 << 2)
	720 µA
constexpr uint16_t	tle92466ed::CH_CONFIG::I_DIAG_1250UA = (3 << 2)
	1250 µA
constexpr uint16_t	tle92466ed::CH_CONFIG::I_DIAG_MASK = 0x000C
	I_DIAG mask.
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_DISABLED = (0 << 4)
	OL detection disabled.
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_1_8 = (1 << 4)
	1/8 of setpoint
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_2_8 = (2 << 4)
	2/8 of setpoint
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_3_8 = (3 << 4)
	3/8 of setpoint
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_4_8 = (4 << 4)
	4/8 of setpoint
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_5_8 = (5 << 4)
	5/8 of setpoint
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_6_8 = (6 << 4)
	6/8 of setpoint
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_7_8 = (7 << 4)
	7/8 of setpoint
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_MASK = 0x0070
	OL threshold mask.
constexpr uint8_t	tle92466ed::CH_CONFIG::OL_TH_VALUE_MASK = 0x07
	OL threshold value mask (3 bits: 0-7)
constexpr uint8_t	tle92466ed::CH_CONFIG::OL_TH_SHIFT = 4
	OL threshold shift in register.
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_FIXED_SHIFT = 7
constexpr uint16_t	tle92466ed::CH_CONFIG::OL_TH_FIXED_MASK = 0x1F80
constexpr uint16_t	tle92466ed::CH_CONFIG::OC_DIAG_EN = (1 << 13)
	OC diag in OFF state.
constexpr uint16_t	tle92466ed::CH_CONFIG::OFF_DIAG_ENABLED = (0 << 14)
	OFF diag enabled.
constexpr uint16_t	tle92466ed::CH_CONFIG::OFF_DIAG_LS_ONLY = (1 << 14)
	Low side current only.
constexpr uint16_t	tle92466ed::CH_CONFIG::OFF_DIAG_HS_ONLY = (2 << 14)
	High side current only.
constexpr uint16_t	tle92466ed::CH_CONFIG::OFF_DIAG_MASK = 0xC000
	OFF diag mask.
constexpr uint16_t	tle92466ed::CH_CONFIG::DEFAULT = 0x0003
	Default value.
constexpr uint16_t	tle92466ed::CH_MODE::OFF = 0x0000
	Channel off.
constexpr uint16_t	tle92466ed::CH_MODE::ICC_CURRENT_CTRL = 0x0001
	ICC current control.
constexpr uint16_t	tle92466ed::CH_MODE::DIRECT_DRIVE_SPI = 0x0002
	Direct drive via SPI.
constexpr uint16_t	tle92466ed::CH_MODE::DIRECT_DRIVE_DRV0 = 0x0003
	Direct drive via DRV0 pin.
constexpr uint16_t	tle92466ed::CH_MODE::DIRECT_DRIVE_DRV1 = 0x0004
	Direct drive via DRV1 pin.
constexpr uint16_t	tle92466ed::CH_MODE::FREE_RUN_MEAS = 0x000C
	Free running measurement.
constexpr uint16_t	tle92466ed::CH_MODE::MODE_MASK = 0x000F
	Mode mask.
constexpr uint16_t	tle92466ed::CH_MODE::DEFAULT = OFF
	Default (off)
constexpr uint16_t	tle92466ed::TON::TON_MANT_MASK = 0x03FFu
	10-bit mantissa mask
constexpr uint16_t	tle92466ed::TON::OLSG_TIMEOUT_SHIFT = 10u
	OLSG timeout shift.
constexpr uint16_t	tle92466ed::TON::OLSG_TIMEOUT_MASK = 0xFC00u
	6-bit OLSG timeout mask
constexpr uint16_t	tle92466ed::TON::DEFAULT = 0x0000
	POR default.
constexpr uint16_t	tle92466ed::INTEGRATOR_LIMIT::LIM_VALUE_ABS_MASK = 0x03FFu
	10-bit
constexpr uint16_t	tle92466ed::INTEGRATOR_LIMIT::AUTO_LIM_VALUE_ABS_SHIFT = 10u
constexpr uint16_t	tle92466ed::INTEGRATOR_LIMIT::AUTO_LIM_VALUE_ABS_MASK = 0x7C00u
	5-bit
constexpr uint16_t	tle92466ed::INTEGRATOR_LIMIT::DEFAULT = 0x43FFu
constexpr uint16_t	tle92466ed::CTRL_INT_THRESH::INT_THRESH_MASK = 0x01FFu
	9-bit, bits 8:0
constexpr uint16_t	tle92466ed::CTRL_INT_THRESH::INT_THRESH_MAX = 0x01FFu
	Field maximum (511)
constexpr uint16_t	tle92466ed::CTRL_INT_THRESH::DEFAULT = 0x0003u
	POR per §5.3.3.13.
constexpr uint16_t	tle92466ed::CLK_DIV::EXT_CLK_BIT = (1u << 15)
constexpr uint16_t	tle92466ed::CLK_DIV::PLL_REFDIV_SHIFT = 9u
constexpr uint16_t	tle92466ed::CLK_DIV::PLL_REFDIV_MASK = 0x7E00u
constexpr uint16_t	tle92466ed::CLK_DIV::PLL_FBDIV_MASK = 0x01FFu
constexpr uint32_t	tle92466ed::CLK_DIV::F_SYS_TARGET_HZ = 28'000'000UL
	Target fSYS.
constexpr uint16_t	tle92466ed::CLK_DIV::INTERNAL_OSC = 0x0000u
	Internal-oscillator configuration (no PLL).
constexpr uint16_t	tle92466ed::SFF_BIST::EN = (1u << 0)
constexpr uint16_t	tle92466ed::SFF_BIST::DONE = (1u << 1)
constexpr uint16_t	tle92466ed::SFF_BIST::FAIL = (1u << 2)
constexpr uint16_t	tle92466ed::SFF_BIST::UERR = (1u << 3)
constexpr uint16_t	tle92466ed::SFF_BIST::CERR = (1u << 4)
constexpr uint16_t	tle92466ed::SFF_BIST::DEFAULT = 0x0000
constexpr uint16_t	tle92466ed::PIN_STAT::DRV0 = (1u << 0)
constexpr uint16_t	tle92466ed::PIN_STAT::DRV1 = (1u << 1)
constexpr uint16_t	tle92466ed::PIN_STAT::EN = (1u << 4)
constexpr uint16_t	tle92466ed::PIN_STAT::FAULTN = (1u << 5)
constexpr uint16_t	tle92466ed::PIN_STAT::FAULTN_FB = (1u << 6)
constexpr uint16_t	tle92466ed::FAULT_MASK0::CH_ERR_MASK = 0x003Fu
	Per-channel error (CH0..5)
constexpr uint16_t	tle92466ed::FAULT_MASK0::EN_PIN_MASK = (1u << 13)
constexpr uint16_t	tle92466ed::FAULT_MASK0::SUP_NOK_INT_MASK = (1u << 14)
constexpr uint16_t	tle92466ed::FAULT_MASK0::SUP_NOK_EXT_MASK = (1u << 15)
constexpr uint16_t	tle92466ed::FAULT_MASK0::DEFAULT = 0xC03Fu
constexpr uint16_t	tle92466ed::FAULT_MASK1::CH_WARN_MASK = 0x003Fu
	Per-channel warning (CH0..5)
constexpr uint16_t	tle92466ed::FAULT_MASK1::COTWARN_MASK = (1u << 12)
constexpr uint16_t	tle92466ed::FAULT_MASK1::COTERR_MASK = (1u << 13)
constexpr uint16_t	tle92466ed::FAULT_MASK1::CLK_LOW_MASK = (1u << 14)
constexpr uint16_t	tle92466ed::FAULT_MASK1::DEFAULT = 0x703Fu
constexpr uint16_t	tle92466ed::FAULT_MASK2::VBAT_UV_MASK = (1u << 0)
constexpr uint16_t	tle92466ed::FAULT_MASK2::VBAT_OV_MASK = (1u << 1)
constexpr uint16_t	tle92466ed::FAULT_MASK2::VIO_UV_MASK = (1u << 2)
constexpr uint16_t	tle92466ed::FAULT_MASK2::VIO_OV_MASK = (1u << 3)
constexpr uint16_t	tle92466ed::FAULT_MASK2::VDD_UV_MASK = (1u << 4)
constexpr uint16_t	tle92466ed::FAULT_MASK2::VDD_OV_MASK = (1u << 5)
constexpr uint16_t	tle92466ed::FAULT_MASK2::DATA_ERR_MASK = (1u << 14)
	FB_STAT.DATA_err → FAULTN.
constexpr uint16_t	tle92466ed::FAULT_MASK2::SPI_WD_MASK = (1u << 15)
	SPI watchdog → FAULTN.
constexpr uint16_t	tle92466ed::FAULT_MASK2::DEFAULT = 0xC000u
constexpr uint16_t	tle92466ed::DITHER_CTRL::STEP_SIZE_MASK = 0x0FFF
	Step size mask.
constexpr uint16_t	tle92466ed::DITHER_CTRL::DEEP_DITHER = (1 << 13)
	Deep dither enable.
constexpr uint16_t	tle92466ed::DITHER_CTRL::FAST_MEAS_DITH = (0 << 14)
	Dither period.
constexpr uint16_t	tle92466ed::DITHER_CTRL::FAST_MEAS_HALF = (1 << 14)
	Half dither period.
constexpr uint16_t	tle92466ed::DITHER_CTRL::FAST_MEAS_QUAD = (2 << 14)
	Quarter dither period.
constexpr uint16_t	tle92466ed::DITHER_CTRL::FAST_MEAS_MASK = 0xC000
	Fast meas mask.
constexpr uint16_t	tle92466ed::DITHER_CTRL::DEFAULT = 0x0000
	Default value.
constexpr uint16_t	tle92466ed::DITHER_STEP::FLAT_MASK = 0x00FF
	Flat period mask.
constexpr uint16_t	tle92466ed::DITHER_STEP::STEPS_SHIFT = 8
	Steps shift.
constexpr uint16_t	tle92466ed::DITHER_STEP::STEPS_MASK = 0xFF00
	Steps mask.
constexpr uint16_t	tle92466ed::DITHER_STEP::DEFAULT = 0x0000
	Default value.
constexpr uint16_t	tle92466ed::DITHER_CLK_DIV::MANT_MASK = 0x03FFu
	10-bit mantissa mask
constexpr uint16_t	tle92466ed::DITHER_CLK_DIV::EXP_SHIFT = 10u
	Exponent bit position.
constexpr uint16_t	tle92466ed::DITHER_CLK_DIV::EXP_MASK = 0x3C00u
	4-bit exponent mask
constexpr uint8_t	tle92466ed::DITHER_CLK_DIV::EXP_VALUE_MASK = 0x0Fu
	Exponent value (4 bits)
constexpr uint16_t	tle92466ed::DITHER_CLK_DIV::DITHER_PWM_SYNC_EN_BIT = (1u << 14)
constexpr uint16_t	tle92466ed::DITHER_CLK_DIV::DITHER_SETPOINT_SYNC_EN_BIT = (1u << 15)
constexpr uint32_t	tle92466ed::DITHER_CLK_DIV::F_SYS_HZ = 28'000'000UL
	System clock (28 MHz, §4.2.1)
constexpr float	tle92466ed::DITHER_CLK_DIV::F_SYS_PERIOD_US = 1.0F / 28.0F
	1 / fSYS (µs, ≈35.71 ns)
constexpr float	tle92466ed::DITHER::F_SYS_HZ = 28'000'000.0F
	System clock frequency (28 MHz)
constexpr float	tle92466ed::DITHER::DEFAULT_T_REF_CLK_US = 1.0F / 28.0F
	tref_clk at MANT=1, EXP=0 (≈35.71 ns)
constexpr float	tle92466ed::VBAT_THRESHOLD::LSB_VOLTAGE = 0.16208F
	Voltage per LSB (0.16208V)
constexpr float	tle92466ed::VBAT_THRESHOLD::MIN_VOLTAGE = 0.0F
	Minimum voltage (0V)
constexpr float	tle92466ed::VBAT_THRESHOLD::MAX_VOLTAGE = 41.4F
	Maximum voltage (255 × 0.16208V)
constexpr float	tle92466ed::VOLTAGE_FEEDBACK::VIO_VDD_LSB_VOLTAGE = 0.0034534F
	Voltage per LSB for VIO/VDD (0.0034534V)
constexpr uint32_t	tle92466ed::VOLTAGE_FEEDBACK::VIO_VDD_MASK = 0x7FF
	11-bit mask (bits 10:0)
constexpr uint32_t	tle92466ed::VOLTAGE_FEEDBACK::VDD_SHIFT = 11
	VDD is in bits [21:11].
constexpr float	tle92466ed::VOLTAGE_FEEDBACK::VBAT_MAX_VOLTAGE = 41.47F
	Maximum VBAT voltage (41.47V)
constexpr uint32_t	tle92466ed::VOLTAGE_FEEDBACK::VBAT_MAX_COUNT = 2047
	Maximum count (2^11 - 1)
constexpr uint32_t	tle92466ed::VOLTAGE_FEEDBACK::VBAT_MASK = 0x7FF
	11-bit mask (bits 10:0)
constexpr uint32_t	tle92466ed::VOLTAGE_FEEDBACK::VBAT_SHIFT = 11
	VBAT is in bits [21:11].
constexpr uint32_t	tle92466ed::FB_IMIN_IMAX::IMIN_SHIFT = 0u
constexpr uint32_t	tle92466ed::FB_IMIN_IMAX::IMIN_MASK = 0x3FFu
constexpr uint32_t	tle92466ed::FB_IMIN_IMAX::IMAX_SHIFT = 10u
constexpr uint32_t	tle92466ed::FB_IMIN_IMAX::IMAX_MASK = 0x3FFu
constexpr int32_t	tle92466ed::FB_IMIN_IMAX::FULL_SCALE_mA = 4000
constexpr int32_t	tle92466ed::FB_IMIN_IMAX::FULL_SCALE_COUNT = 511
constexpr uint32_t	tle92466ed::FB_FEEDBACK::MANT11_MASK = 0x7FFu
	11-bit mantissa mask
constexpr uint32_t	tle92466ed::FB_FEEDBACK::TP_MANT_SHIFT = 0u
	FB_DC: TP_MANT in [10:0].
constexpr uint32_t	tle92466ed::FB_FEEDBACK::TO_MANT_SHIFT = 11u
	FB_DC: TO_MANT in [21:11].
constexpr uint32_t	tle92466ed::FB_FEEDBACK::I_AVG_MANT_SHIFT = 0u
	FB_I_AVG: I_AVG_MANT in [10:0].
constexpr uint32_t	tle92466ed::FB_FEEDBACK::VBAT_MANT_SHIFT = 0u
	FB_VBAT: VBAT_AVG_MANT in [10:0].
constexpr uint32_t	tle92466ed::FB_FEEDBACK::MEAS_EXP_SHIFT = 12u
	FB_VBAT/FB_I_AVG: EXP in [15:12].
constexpr uint32_t	tle92466ed::FB_FEEDBACK::MEAS_EXP_MASK = 0xFu
	4-bit exponent mask
constexpr float	tle92466ed::FB_FEEDBACK::I_AVG_FULL_SCALE_AMPS = 4.0f
	Iavg formula scale (4 A)
constexpr float	tle92466ed::FB_FEEDBACK::VBAT_FULL_SCALE_VOLTS = 41.47f
	VBAT formula scale (41.47 V)
constexpr uint16_t	tle92466ed::FB_FEEDBACK::kMinValidTpMant = 64u
	Smallest TP_MANT that makes the mantissa-ratio formula meaningful.
constexpr uint32_t	tle92466ed::FB_I_AVG_s16::I_AVG_MASK = 0x0001FFFFu
	17-bit
constexpr uint32_t	tle92466ed::FB_I_AVG_s16::I_AVG_SIGN_BIT = (1u << 16)
constexpr uint32_t	tle92466ed::FB_I_AVG_s16::TIME_STAMP_SHIFT = 20u
constexpr uint32_t	tle92466ed::FB_I_AVG_s16::TIME_STAMP_MASK = 0x00300000u
	2-bit
constexpr int32_t	tle92466ed::FB_I_AVG_s16::FULL_SCALE_mA = 4000
constexpr int32_t	tle92466ed::FB_I_AVG_s16::FULL_SCALE_COUNT = 65535
constexpr uint32_t	tle92466ed::FB_I_AVG_s16::SETTLING_CODE = 0x8000u
	Raw code the frame carries before a measurement has settled.
constexpr uint32_t	tle92466ed::FB_INT_THRESH::INT_THRESH_MASK = 0x0000FFFFu
constexpr uint32_t	tle92466ed::FB_PERIOD_MIN_MAX::PERIOD_MIN_MASK = 0x000003FFu
constexpr uint32_t	tle92466ed::FB_PERIOD_MIN_MAX::PERIOD_MAX_SHIFT = 10u
constexpr uint32_t	tle92466ed::FB_PERIOD_MIN_MAX::PERIOD_MAX_MASK = 0x000FFC00u
constexpr uint32_t	tle92466ed::FB_PERIOD_MIN_MAX::TICK_CYCLES = 256u

Detailed Description

Register definitions and bit field mappings for TLE92466ED.

Copyright

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