Namespaces
namespace	profiles

Classes
class	BusInterface
	CRTP template interface for PF1550 bus and strap pins. More...

struct	DiagnosticSnapshot
	Full diagnostic snapshot returned by `PF1550::ReadDiagnosticSnapshot()`. More...

struct	FaultFlags
	Bitset of latched fault flags. More...

struct	IntCategoryBits
	Bit positions within INT_CATEGORY (Reg 0x06). More...

struct	LdoCtrlBits
	Bit positions within `LDOn_CTRL` (0x4D / 0x50 / 0x53). More...

struct	LdoIntStat0Bits
	Bit positions within LDO_INT_STAT0 (Reg 0x18) — LDO current-limit faults. More...

struct	MiscIntStat0Bits
	Bit positions within MISC_INT_STAT0 (Reg 0x28, Table 108). Bits 7:5 are unused. More...

struct	OtpRegion
	OTP memory indirect address range (via FMRADDR/FMRDATA). More...

struct	OtpUnlockKeys
	OTP indirect-read unlock sequence (Section 12.x KEY1 / KEY2 / KEY3). More...

class	PF1550
	CRTP-based PF1550 PMIC driver. More...

struct	RailDiagnostics
	Per-rail status snapshot (latched + live + control byte). More...

struct	SelfTestResult
	Result of a power self-test pass. More...

struct	SwCtrlBits
	Bit positions within `SWn_CTRL` (e.g. 0x35 / 0x3B / 0x41). More...

struct	SwIntStat0Bits
	Bit positions within SW_INT_STAT0 (Reg 0x08) — low-side current-limit faults. More...

struct	SwIntStat1Bits
	Bit positions within SW_INT_STAT1 (Reg 0x0B, Table 93) — high-side current-limit faults. SW_INT_SENSE1 (0x0D) uses the same layout. More...

struct	TempIntStat0Bits
	Bit positions within TEMP_INT_STAT0 (Reg 0x20, Table 102). Bit 1 is unused. More...

Enumerations
enum class	RailId : uint8_t { Sw1 = 0 , Sw2 = 1 , Sw3 = 2 , Ldo1 = 3 , Ldo2 = 4 , Ldo3 = 5 , Vsnvs = 6 , COUNT = 7 }
	Logical identifier for each independently-controllable PF1550 output. More...

enum class	FaultSeverity : uint8_t { kInfo = 0 , kWarning = 1 , kCritical = 2 , kMcuKill = 3 }
	Severity classification for a fault. More...

enum class	CtrlPin : uint8_t { Standby = 0 , UsbVbusEn = 1 , UsbOtgEn = 2 , PmicInt = 3 }
	Platform-wired PF1550 control signals (beyond I2C). More...

enum class	GpioSignal : uint8_t { Inactive = 0 , Active = 1 }

enum class	PowerMode : uint8_t { Run = 0 , Standby = 1 }

enum class	Register : uint8_t { DeviceId = 0x00 , OtpFlavor = 0x01 , SiliconRev = 0x02 , IntCategory = 0x06 , SwIntStat0 = 0x08 , SwIntMask0 = 0x09 , SwIntSense0 = 0x0A , SwIntStat1 = 0x0B , SwIntMask1 = 0x0C , SwIntSense1 = 0x0D , SwIntStat2 = 0x0E , SwIntMask2 = 0x0F , SwIntSense2 = 0x10 , LdoIntStat0 = 0x18 , LdoIntMask0 = 0x19 , LdoIntSense0 = 0x1A , TempIntStat0 = 0x20 , TempIntMask0 = 0x21 , TempIntSense0 = 0x22 , OnKeyIntStat0 = 0x24 , OnKeyIntMask0 = 0x25 , OnKeyIntSense0 = 0x26 , MiscIntStat0 = 0x28 , MiscIntMask0 = 0x29 , MiscIntSense0 = 0x2A , CoinCellCtrl = 0x30 , Sw1Volt = 0x32 , Sw1StbyVolt = 0x33 , Sw1SlpVolt = 0x34 , Sw1Ctrl = 0x35 , Sw1Ctrl1 = 0x36 , Sw2Volt = 0x38 , Sw2StbyVolt = 0x39 , Sw2SlpVolt = 0x3A , Sw2Ctrl = 0x3B , Sw2Ctrl1 = 0x3C , Sw3Volt = 0x3E , Sw3StbyVolt = 0x3F , Sw3SlpVolt = 0x40 , Sw3Ctrl = 0x41 , Sw3Ctrl1 = 0x42 , VsnvsCtrl = 0x48 , VrefDdrCtrl = 0x4A , Ldo1Volt = 0x4C , Ldo1Ctrl = 0x4D , Ldo2Volt = 0x4F , Ldo2Ctrl = 0x50 , Ldo3Volt = 0x52 , Ldo3Ctrl = 0x53 , PwrCtrl0 = 0x58 , PwrCtrl1 = 0x59 , PwrCtrl2 = 0x5A , PwrCtrl3 = 0x5B , Sw1PwrDnSeq = 0x5F , Sw2PwrDnSeq = 0x60 , Sw3PwrDnSeq = 0x61 , Ldo1PwrDnSeq = 0x62 , Ldo2PwrDnSeq = 0x63 , Ldo3PwrDnSeq = 0x64 , VrefDdrPwrDnSeq = 0x65 , StateInfo = 0x67 , I2cAddrReg = 0x68 , Rc16Mhz = 0x6B , OtpKey1 = 0x6F , ChargerLedDuty = 0x9C , OtpKey2 = 0x9F , ChargerLedCtrl = 0x9E , VbusInCurrentLimit = 0x94 , FmrAddr = 0xC4 , FmrData = 0xC5 , TestRegKey3 = 0xDF , ChgInt = 0x80 , ChgIntMask = 0x82 , ChgIntOk = 0x84 , VbusSns = 0x86 , ChgSense = 0x87 }
	Symbolic register addresses used by the PF1550 driver. More...

enum class	PmicState : uint8_t { Wait = 0b000000 , Run = 0b001100 , Standby = 0b001101 , Sleep = 0b001110 , RegsDisable = 0b101011 , Unknown = 0xFF }
	STATE_INFO[5:0] values (Reg 0x67) describing the PMIC state machine. More...

enum class	ChargerState : uint8_t { PreCharge = 0 , FastCC = 1 , FastCV = 2 , EndOfCharge = 3 , Done = 4 , TimerFault = 6 , ThermSuspend = 7 , Off = 8 , BatteryOv = 9 , TempShutdown = 10 , LinearOnly = 12 , Unknown = 0xFF }
	CHG_SNS[3:0] values (Reg 0x87) describing the charger sub-state. More...

enum class	SwVoltageCode : uint8_t { V1_1 = 0x00 , V2_5 = 0x05 , V3_0 = 0x06 , V3_3 = 0x07 , V3_1 = 0x0D }
	Common SW buck output voltage codes (RUN mode). More...

enum class	LdoVoltageCode : uint8_t { V1_0 = 0x05 , V1_2 = 0x09 , V1_8 = 0x00 }
	Common LDO output voltage codes used on Portenta H7 (Table 41). More...

Functions
constexpr RailId	FaultRail (uint32_t single_flag) noexcept
	Map a single fault flag to the rail it relates to, or RailId::COUNT if the fault is system-wide.

constexpr FaultSeverity	FaultSeverityPortentaH7 (uint32_t single_flag) noexcept
	Classify the severity of a Portenta H7 eval fault.

constexpr FaultSeverity	WorstSeverityPortentaH7 (FaultFlags fl) noexcept
	Return the worst-case severity across an aggregated bitmask.

constexpr const char *	RailName (RailId id) noexcept
	Human-readable rail label (`"SW1"`, `"LDO2"`, …).

constexpr const char *	PmicStateName (PmicState s) noexcept
	Human-readable name for a PmicState enumerator.

constexpr const char *	ChargerStateName (ChargerState s) noexcept
	Human-readable name for a ChargerState enumerator.

constexpr const char *	FaultSeverityName (FaultSeverity s) noexcept
	Human-readable name for a FaultSeverity.

constexpr uint16_t	SwCodeToMillivolts (uint8_t code) noexcept
	SW1 / SW2 output voltage, DVS disabled (`OTP_SWx_DVS_SEL = 1`).

constexpr uint16_t	SwDvsCodeToMillivolts (uint8_t code) noexcept
	SW1 / SW2 output voltage, DVS enabled (`OTP_SWx_DVS_SEL = 0`): 0.6000 V + 12.5 mV × code (Table 31, left column), rounded to mV.

constexpr uint8_t	SwDvsMillivoltsToCode (uint16_t mv) noexcept
	Encode a DVS-enabled SW1 / SW2 voltage (Table 31, left column).

constexpr uint16_t	Sw3CodeToMillivolts (uint8_t code) noexcept
	SW3 output voltage (Table 37): 1.80 V + 100 mV × `SW3_VOLT[3:0]`.

constexpr uint8_t	SwMillivoltsToCode (uint16_t mv) noexcept
	Build a 6-bit SW voltage code from millivolts (Portenta-verified codes).

constexpr uint16_t	LdoCodeToMillivolts (uint8_t code, bool is_ldo2) noexcept
	Decode a 5-bit LDO voltage register field to millivolts.

constexpr uint16_t	VbusLimitRegToMilliamps (uint8_t reg_value) noexcept
	Decode VBUS_IN_LIM_CNFG (absolute address 0x94) register byte to mA.

constexpr uint8_t	VbusLimitMilliampsToReg (uint16_t mA) noexcept
	Encode mA → VBUS_IN_LIM_CNFG (0x94) register byte (bits 7:3).

constexpr uint16_t	SwCurrentLimitCodeToMilliamps (uint8_t code) noexcept
	Decode the `SW3_CTRL1[1:0]` (or SW1/SW2_CTRL1) current limit field.

constexpr PmicState	DecodeStateInfo (uint8_t reg) noexcept
	Convert STATE_INFO (0x67) full byte into a typed PmicState.

constexpr ChargerState	DecodeChargerSense (uint8_t reg) noexcept
	Convert CHG_SNS (0x87) into a typed ChargerState.

Variables
constexpr uint8_t	kDefaultI2cAddress = 0x08
	Default 7-bit I²C slave address (settable via OTP — see Table 147).

constexpr uint8_t	kExpectedDeviceId = 0x7C
	Expected `DEVICE_ID[2:0]` family identifier (PF1550 family = `100b`).

constexpr uint16_t	kVsnvsMillivolts = 3000
	VSNVS output voltage: fixed 3.0 V (VSNVS_CTRL has no voltage field, Table 127).

constexpr uint8_t	kChargerPageBase = 0x80
	Base offset for Section 12.2 charger sub-page (see datasheet §12.2).

Enumeration Type Documentation

◆ ChargerState

enum class pf1550::ChargerState : uint8_t

strong

CHG_SNS[3:0] values (Reg 0x87) describing the charger sub-state.

Enumerator
PreCharge	Precharge mode (V_BATT < V_PRECHG.LB).
FastCC	Fast-charge constant-current.
FastCV	Fast-charge constant-voltage.
EndOfCharge	End-of-charge (I_BAT = I_EOC).
Done	Done — battery full.
TimerFault	Timer fault.
ThermSuspend	Thermistor suspend.
Off	Input invalid or charger disabled.
BatteryOv	Battery overvoltage.
TempShutdown	Off because TJ > TSHDN.
LinearOnly	Linear-only mode, no charge.
Unknown

◆ CtrlPin

enum class pf1550::CtrlPin : uint8_t

strong

Platform-wired PF1550 control signals (beyond I2C).

Portenta H7 mapping:

STANDBY: PJ0, active-high for standby (drive low for RUN)
USB_VBUS_EN: PJ4
USB_OTG_EN: PJ6
PMIC_INT: PK0 (input, optional)

Enumerator
Standby
UsbVbusEn
UsbOtgEn
PmicInt

◆ FaultSeverity

enum class pf1550::FaultSeverity : uint8_t

strong

Severity classification for a fault.

kInfo — informational latched bit (e.g. PWRON press).
kWarning — recoverable condition (e.g. junction temp warning).
kCritical — affects a rail that is not powering the MCU directly; the MCU can still execute and mitigate.
kMcuKill — affects an MCU-critical rail (SW3/LDO1/LDO3 on Portenta H7) — by definition the MCU may already be resetting; an external monitor must take over.

Enumerator
kInfo
kWarning
kCritical
kMcuKill

◆ GpioSignal

enum class pf1550::GpioSignal : uint8_t

strong

Enumerator
Inactive
Active

◆ LdoVoltageCode

enum class pf1550::LdoVoltageCode : uint8_t

strong

Common LDO output voltage codes used on Portenta H7 (Table 41).

Enumerator
V1_0	1.000 V (LDO1)
V1_2	1.200 V (LDO3)
V1_8	1.800 V (LDO2 — code 0)

◆ PmicState

enum class pf1550::PmicState : uint8_t

strong

STATE_INFO[5:0] values (Reg 0x67) describing the PMIC state machine.

Enumerator
Wait	Wait / start-up before regulators are sequenced.
Run	RUN — all OTP-sequenced regulators enabled.
Standby	STANDBY — standby-enabled regulators only.
Sleep	SLEEP / LPSR — minimal regulators.
RegsDisable	REGS_DISABLE — all regulators off (post PWRON long-press).
Unknown

◆ PowerMode

enum class pf1550::PowerMode : uint8_t

strong

Enumerator
Run
Standby

◆ RailId

enum class pf1550::RailId : uint8_t

strong

Logical identifier for each independently-controllable PF1550 output.

Used to index into RailDiagnostics arrays and to label log lines.

Enumerator
Sw1	SW1 / BUCK1 — Portenta +3V1SW (feeds LDO inputs).
Sw2	SW2 / BUCK2 — Portenta +3V3 / carrier VOUT.
Sw3	SW3 / BUCK3 — Portenta +3V1 VCORE (MCU + QSPI).
Ldo1	LDO1 — Portenta +1V0 (MIPI bridge analog).
Ldo2	LDO2 — Portenta +1V8 (USB PHY, MIPI).
Ldo3	LDO3 — Portenta +1V2 (STM32 DSI, ETH PHY).
Vsnvs	VSNVS — RTC / backup LDO (≤2 mA).
COUNT

◆ Register

enum class pf1550::Register : uint8_t

strong

Symbolic register addresses used by the PF1550 driver.

Names follow datasheet Table N — Register XXX - ADDR yy exactly so cross-reference is trivial. Charger-page registers (§12.2) are mapped to their kChargerPageBase-offset absolute addresses.

Enumerator
DeviceId	DEVICE_ID — Table 86. Bits[2:0] = family, [7:3] = `01111` for PF1550.
OtpFlavor	OTP_FLAVOR — Table 87. 0x00 = OTP not burned (A0EP).
SiliconRev	SILICON_REV — Table 88. Metal/full-layer/fab-fin identifiers.
IntCategory	INT_CATEGORY — Table 89. CHG/SW1/SW2/SW3/LDO/ONKEY/TEMP/MISC summary.
SwIntStat0	SW_INT_STAT0 — low-side current limits (SW1/2/3).
SwIntMask0	SW_INT_MASK0.
SwIntSense0	SW_INT_SENSE0.
SwIntStat1	SW_INT_STAT1 — high-side current limits.
SwIntMask1	SW_INT_MASK1.
SwIntSense1	SW_INT_SENSE1.
SwIntStat2	SW_INT_STAT2 — DVS done.
SwIntMask2	SW_INT_MASK2.
SwIntSense2	SW_INT_SENSE2.
LdoIntStat0	LDO_INT_STAT0 — Table 99. LDO1/2/3 current-limit faults.
LdoIntMask0	LDO_INT_MASK0.
LdoIntSense0	LDO_INT_SENSE0.
TempIntStat0	TEMP_INT_STAT0 — Table 102. Junction-temperature events.
TempIntMask0	TEMP_INT_MASK0.
TempIntSense0	TEMP_INT_SENSE0.
OnKeyIntStat0	ONKEY_INT_STAT0 — Table 105. Push / 1s/2s/3s/4s/8s long-press.
OnKeyIntMask0	ONKEY_INT_MASK0.
OnKeyIntSense0	ONKEY_INT_SENSE0.
MiscIntStat0	MISC_INT_STAT0 — Table 108. PWRON / VSYS / RESETBMCU events.
MiscIntMask0	MISC_INT_MASK0.
MiscIntSense0	MISC_INT_SENSE0.
CoinCellCtrl	COINCELL_CONTROL — Table 111. LICELL charging configuration.
Sw1Volt	SW1_VOLT — RUN-mode voltage code (Table 31).
Sw1StbyVolt	SW1_STBY_VOLT — STANDBY-mode voltage.
Sw1SlpVolt	SW1_SLP_VOLT — SLEEP-mode voltage.
Sw1Ctrl	SW1_CTRL — EN/STBY_EN/OMODE/LPWR/DVSSPEED/FPWM/RDIS_ENB.
Sw1Ctrl1	SW1_CTRL1 — SW1_ILIM[1:0] current limit + TMODE_SEL.
Sw2Volt	SW2_VOLT — Table 117.
Sw2StbyVolt	SW2_STBY_VOLT.
Sw2SlpVolt	SW2_SLP_VOLT.
Sw2Ctrl	SW2_CTRL — Table 120.
Sw2Ctrl1	SW2_CTRL1 — SW2_ILIM[1:0].
Sw3Volt	SW3_VOLT — Table 122.
Sw3StbyVolt	SW3_STBY_VOLT.
Sw3SlpVolt	SW3_SLP_VOLT.
Sw3Ctrl	SW3_CTRL.
Sw3Ctrl1	SW3_CTRL1 — Table 126. SW3_ILIM[1:0] + SW3_TMODE_SEL (Portenta writes `0x02` = 1.5 A typical).
VsnvsCtrl	VSNVS_CTRL — Table 127. RTC/SNVS backup LDO control.
VrefDdrCtrl	VREFDDR_CTRL — Table 128. DDR reference (unused on Portenta).
Ldo1Volt	LDO1_VOLT.
Ldo1Ctrl	LDO1_CTRL.
Ldo2Volt	LDO2_VOLT.
Ldo2Ctrl	LDO2_CTRL — must be written last in Portenta profile.
Ldo3Volt	LDO3_VOLT.
Ldo3Ctrl	LDO3_CTRL.
PwrCtrl0	PWRCTRL0 — STANDBYDLY, STANDBYINV, POR_DLY, TGRESET.
PwrCtrl1	PWRCTRL1 — PWRONDBNC, ONKEYDBNC, PWRONRSTEN, RESTARTEN, REGSCPEN.
PwrCtrl2	PWRCTRL2 — WDI_EN, WDI_POL etc.
PwrCtrl3	PWRCTRL3 — sequence delay etc.
Sw1PwrDnSeq	SW1_PWRDN_SEQ.
Sw2PwrDnSeq	SW2_PWRDN_SEQ.
Sw3PwrDnSeq	SW3_PWRDN_SEQ.
Ldo1PwrDnSeq	LDO1_PWRDN_SEQ.
Ldo2PwrDnSeq	LDO2_PWRDN_SEQ.
Ldo3PwrDnSeq	LDO3_PWRDN_SEQ.
VrefDdrPwrDnSeq	VREFDDR_PWRDN_SEQ.
StateInfo	STATE_INFO — Table 146. STATE[5:0] = Wait/RUN/STANDBY/SLEEP/REGS_DISABLE.
I2cAddrReg	I2C_ADDR — Table 147 (read-only, OTP-driven).
Rc16Mhz	RC_16MHZ — 16 MHz clock force, analog core overrides.
OtpKey1	KEY1 unlock (write `0x15`).
ChargerLedDuty	LED_PWM — Table 170. LED_EN, LED_RAMP, LED_PWM[5:0] duty (Portenta writes `0x80`).
OtpKey2	KEY2 unlock (write `0x50`).
ChargerLedCtrl	LED_CNFG — Table 172. LEDOVRD, LED_CFG, current, frequency (Portenta writes `0x20`).
VbusInCurrentLimit	VBUS input current limit ((mA/50) << 3 — Portenta uses 1500 mA → `0xA0`).
FmrAddr	FMRADDR — OTP indirect address.
FmrData	FRMDATA — OTP indirect data.
TestRegKey3	TEST_REG_KEY3 — third OTP unlock key (write `0xAB`).
ChgInt	CHG_INT — Table 150. SUP_I/BAT2SOC_I/CHGREV_I/CHG_I.
ChgIntMask	CHG_INT_MASK.
ChgIntOk	CHG_INT_OK — Table 152. CHG_OK, BATT_OK, VBUS_OK.
VbusSns	VBUS_SNS — Table 153. VBUS_VALID, DPM_SNS, OVLO, UVLO.
ChgSense	CHG_SNS — Table 154. Charger mode (precharge, fast-cc, fast-cv, eoc …).

◆ SwVoltageCode

enum class pf1550::SwVoltageCode : uint8_t

strong

Common SW buck output voltage codes (RUN mode).

Full encoding is code → V_out per datasheet Table 31:

DVS disabled (OTP_SWx_DVS_SEL = 1): 1.10, 1.20, 1.35, 1.50, 1.80, 2.50, 3.00 V for codes 0..6, and 3.30 V for every code from 7 up.
DVS enabled (OTP_SWx_DVS_SEL = 0): 0.6000 V + 12.5 mV × code. These enumerators are DVS-disabled codes; SW3 uses Table 37 instead.

Only the codes used on Arduino Portenta H7 eval are enumerated.

Note: The reverse mapping (code → mV) is also provided as a free function in pf1550_voltage_tables.hpp for diagnostics.

Enumerator
V1_1	1.100 V (datasheet base)
V2_5	2.500 V (Portenta STBY/SLP setting)
V3_0	3.000 V (SW1 RUN on Portenta carrier profile)
V3_3	3.300 V (SW2 RUN on Portenta — carrier +3V3)
V3_1	SW3 Table 37 code for 3.100 V (SW3 is OTP-loaded, read-only; SW1/SW2 decode 0x0D as 3.30 V)

Function Documentation

◆ ChargerStateName()

constexpr const char * pf1550::ChargerStateName ( ChargerState s )

constexprnoexcept

Human-readable name for a ChargerState enumerator.

◆ DecodeChargerSense()

constexpr ChargerState pf1550::DecodeChargerSense ( uint8_t reg )

constexprnoexcept

Convert CHG_SNS (0x87) into a typed ChargerState.

◆ DecodeStateInfo()

constexpr PmicState pf1550::DecodeStateInfo ( uint8_t reg )

constexprnoexcept

Convert STATE_INFO (0x67) full byte into a typed PmicState.

Only STATE[5:0] carries meaning; upper bits are reserved.

◆ FaultRail()

constexpr RailId pf1550::FaultRail ( uint32_t single_flag )

constexprnoexcept

Map a single fault flag to the rail it relates to, or RailId::COUNT if the fault is system-wide.

◆ FaultSeverityName()

constexpr const char * pf1550::FaultSeverityName ( FaultSeverity s )

constexprnoexcept

Human-readable name for a FaultSeverity.

◆ FaultSeverityPortentaH7()

constexpr FaultSeverity pf1550::FaultSeverityPortentaH7 ( uint32_t single_flag )

constexprnoexcept

Classify the severity of a Portenta H7 eval fault.

On other platforms the same flag may have a different severity (e.g. a board that runs the MCU from SW2 instead of SW3). Callers should provide board-specific overrides if they re-use the driver for non-Portenta wiring.

◆ LdoCodeToMillivolts()

constexpr uint16_t pf1550::LdoCodeToMillivolts	(	uint8_t	code,
		bool	is_ldo2
	)

constexprnoexcept

Decode a 5-bit LDO voltage register field to millivolts.

Per datasheet Table 41 (LDO1/2/3 voltage encoding):

LDO1, LDO3 (Group A): codes 0x00..0x0F cover 750 mV → 1500 mV (step 50 mV), codes 0x10..0x1F cover 1800 mV → 3300 mV (step 100 mV).
LDO2 (Group B): codes 0x00..0x0F cover 1800 mV → 3300 mV (step 100 mV).

Parameters

code	Raw 5-bit value from `LDOn_VOLT[4:0]`.
is_ldo2	`true` for LDO2 (Group B), `false` for LDO1/LDO3 (Group A).

Returns: Output voltage in mV, or 0 if reserved.

◆ PmicStateName()

constexpr const char * pf1550::PmicStateName ( PmicState s )

constexprnoexcept

Human-readable name for a PmicState enumerator.

◆ RailName()

constexpr const char * pf1550::RailName ( RailId id )

constexprnoexcept

Human-readable rail label ("SW1", "LDO2", …).

◆ Sw3CodeToMillivolts()

constexpr uint16_t pf1550::Sw3CodeToMillivolts ( uint8_t code )

constexprnoexcept

SW3 output voltage (Table 37): 1.80 V + 100 mV × SW3_VOLT[3:0].

Note: SW3 is loaded from OTP and read-only (it has no DVS) — writes are ignored.

◆ SwCodeToMillivolts()

constexpr uint16_t pf1550::SwCodeToMillivolts ( uint8_t code )

constexprnoexcept

SW1 / SW2 output voltage, DVS disabled (OTP_SWx_DVS_SEL = 1).

Datasheet Rev. 7 Table 31, right column: eight set points, every code from 7 up is 3.30 V. Portenta H7 runs SW1 at 3.0 V and SW2 at 3.3 V — values that exist only in this table, so its SW1/SW2 are DVS-disabled. (In that mode the datasheet makes SWx_VOLT read-only.)

Code	mV	Code	mV
0	1100	4	1800
1	1200	5	2500
2	1350	6	3000
3	1500	≥ 7	3300

Parameters

code	Raw `SWx_VOLT[5:0]`.

Returns: Output voltage in mV.

◆ SwCurrentLimitCodeToMilliamps()

constexpr uint16_t pf1550::SwCurrentLimitCodeToMilliamps ( uint8_t code )

constexprnoexcept

Decode the SW3_CTRL1[1:0] (or SW1/SW2_CTRL1) current limit field.

Encoded current limits per Tables 116, 121, 126:

00 → 1.0 A typical
01 → 1.2 A typical
10 → 1.5 A typical
11 → 2.0 A typical

◆ SwDvsCodeToMillivolts()

constexpr uint16_t pf1550::SwDvsCodeToMillivolts ( uint8_t code )

constexprnoexcept

SW1 / SW2 output voltage, DVS enabled (OTP_SWx_DVS_SEL = 0): 0.6000 V + 12.5 mV × code (Table 31, left column), rounded to mV.

◆ SwDvsMillivoltsToCode()

constexpr uint8_t pf1550::SwDvsMillivoltsToCode ( uint16_t mv )

constexprnoexcept

Encode a DVS-enabled SW1 / SW2 voltage (Table 31, left column).

Inverse of SwDvsCodeToMillivolts: accepts exactly the millivolt values that function returns (600 to 1388 mV on the 12.5 mV grid, rounded to mV).

Returns: The 6-bit code, or 0xFF when mv is not on the grid.

◆ SwMillivoltsToCode()

constexpr uint8_t pf1550::SwMillivoltsToCode ( uint16_t mv )

constexprnoexcept

Build a 6-bit SW voltage code from millivolts (Portenta-verified codes).

Returns 0xFF if the requested voltage is not a verified Portenta setting. Use SwVoltageCode for the type-safe variant.

◆ VbusLimitMilliampsToReg()

constexpr uint8_t pf1550::VbusLimitMilliampsToReg ( uint16_t mA )

constexprnoexcept

Encode mA → VBUS_IN_LIM_CNFG (0x94) register byte (bits 7:3).

Only common values are supported (10/100/500/1000/1500 mA). Out-of-grid requests return 0xFF.

◆ VbusLimitRegToMilliamps()

constexpr uint16_t pf1550::VbusLimitRegToMilliamps ( uint8_t reg_value )

constexprnoexcept

Decode VBUS_IN_LIM_CNFG (absolute address 0x94) register byte to mA.

The VBUS input current limit field occupies bits [7:3] of the register and uses a non-linear lookup table (datasheet Table 58):

code	mA	code	mA
0x00	10	0x10	700
0x01	15	0x11	800
0x02	20	0x12	900
0x03	25	0x13	1000
0x04	30	0x14	1500 (Portenta default)
0x05	35	0x15..0x1F	reserved
0x06	40
0x07	45
0x08	50
0x09	100
…	…
0x0F	600

Portenta H7 writes (20 << 3) == 0xA0 (code 0x14 = 1500 mA).

Parameters

reg_value Raw register byte (bits 2:0 ignored).

Returns: Decoded current limit in mA; reserved codes (21..31) return 0.

◆ WorstSeverityPortentaH7()

constexpr FaultSeverity pf1550::WorstSeverityPortentaH7 ( FaultFlags fl )

constexprnoexcept

Return the worst-case severity across an aggregated bitmask.

Variable Documentation

◆ kChargerPageBase

constexpr uint8_t pf1550::kChargerPageBase = 0x80

inlineconstexpr

Base offset for Section 12.2 charger sub-page (see datasheet §12.2).

◆ kDefaultI2cAddress

constexpr uint8_t pf1550::kDefaultI2cAddress = 0x08

inlineconstexpr

Default 7-bit I²C slave address (settable via OTP — see Table 147).

◆ kExpectedDeviceId

constexpr uint8_t pf1550::kExpectedDeviceId = 0x7C

inlineconstexpr

Expected DEVICE_ID[2:0] family identifier (PF1550 family = 100b).

◆ kVsnvsMillivolts

constexpr uint16_t pf1550::kVsnvsMillivolts = 3000

inlineconstexpr

VSNVS output voltage: fixed 3.0 V (VSNVS_CTRL has no voltage field, Table 127).

Namespaces

Classes

Enumerations

Functions

Variables

Enumeration Type Documentation

◆ ChargerState

◆ CtrlPin

◆ FaultSeverity

◆ GpioSignal

◆ LdoVoltageCode

◆ PmicState

◆ PowerMode

◆ RailId

◆ Register

◆ SwVoltageCode

Function Documentation

◆ ChargerStateName()

◆ DecodeChargerSense()

◆ DecodeStateInfo()

◆ FaultRail()

◆ FaultSeverityName()

◆ FaultSeverityPortentaH7()

◆ LdoCodeToMillivolts()

◆ PmicStateName()

◆ RailName()

◆ Sw3CodeToMillivolts()

◆ SwCodeToMillivolts()

◆ SwCurrentLimitCodeToMilliamps()

◆ SwDvsCodeToMillivolts()

◆ SwDvsMillivoltsToCode()

◆ SwMillivoltsToCode()

◆ VbusLimitMilliampsToReg()

◆ VbusLimitRegToMilliamps()

◆ WorstSeverityPortentaH7()

Variable Documentation

◆ kChargerPageBase

◆ kDefaultI2cAddress

◆ kExpectedDeviceId

◆ kVsnvsMillivolts