pf1550::profiles Namespace Reference

Classes
struct	RegisterWrite
	Single I2C register write with optional post-write delay. More...

Variables
constexpr std::array< RegisterWrite, 14 >	kPortentaH7Default
	Portenta H7 eval MCU-domain profile (VFR heritage).
constexpr const char *	kPortentaH7DefaultName = "portenta_h7_default"
	Human-readable profile identifier for logging and HAL binding.
constexpr std::array< RegisterWrite, 14 >	kPortentaH7Carrier
	Portenta H7 + carrier bring-up profile (SW1-first, full SW2 enable).
constexpr const char *	kPortentaH7CarrierName = "portenta_h7_carrier"

Variable Documentation

kPortentaH7Carrier

constexpr std::array<RegisterWrite, 14> pf1550::profiles::kPortentaH7Carrier

inlineconstexpr

Initial value:

= {{
    {0x35, 0x0F, 5000}, 
    {0x4F, 0x00, 0},    
    {0x4C, 0x05, 0},    
    {0x4D, 0x0F, 0},    
    {0x52, 0x09, 0},    
    {0x53, 0x0F, 0},    
    {0x58, 0x03, 0},    
    {0x9C, 0x80, 1000}, 
    {0x9E, 0x20, 1000}, 
    {0x42, 0x02, 1000}, 
    {0x94, 0xA0, 0},    
    {0x3B, 0x0F, 0},    
    {0x41, 0x0F, 0},    
    {0x50, 0x0F, 0},    
}}

Portenta H7 + carrier bring-up profile (SW1-first, full SW2 enable).

Use when LDO1/2/3 inputs are wired to +3V1SW (BUCK1 / SW1 output) and the carrier HDC needs +3V3 on SW2 (BUCK2) including JTAG VTref.

Differences from kPortentaH7Default:

• SW1 (+3V1SW) enable written before LDO registers, then a 5 ms wait.
• SW1_CTRL = 0x0F and SW2_CTRL = 0x0F (RUN + STBY + sleep + LPWR) keep +3V1SW and the carrier +3V3 up in STANDBY.
• Like the default, no SW voltage register writes (read-only, Tables 31 / 37).

Requires a full PMIC power cycle after first apply on cold boot.

kPortentaH7CarrierName

constexpr const char* pf1550::profiles::kPortentaH7CarrierName = "portenta_h7_carrier"

inlineconstexpr

kPortentaH7Default

constexpr std::array<RegisterWrite, 14> pf1550::profiles::kPortentaH7Default

inlineconstexpr

Initial value:

= {{
    {0x4F, 0x00, 0},   
    {0x4C, 0x05, 0},   
    {0x4D, 0x0F, 0},   
    {0x52, 0x09, 0},   
    {0x53, 0x0F, 0},   
    {0x58, 0x03, 0},   
    {0x9C, 0x80, 1000}, 
    {0x9E, 0x20, 1000}, 
    {0x42, 0x02, 1000}, 
    {0x94, 0xA0, 0},   
    {0x3B, 0x01, 0},   
    {0x35, 0x01, 0},   
    {0x41, 0x0F, 0},   
    {0x50, 0x0F, 0},   
}}

Portenta H7 eval MCU-domain profile (VFR heritage).

Sequence derived from PortentaH7_VFR I2C_PMIC_Initialize(), without its SWx_VOLT / SWx_STBY_VOLT / SWx_SLP_VOLT writes: SW3's are read-only (Table 37) and SW1's / SW2's are read-only with DVS disabled (Table 31), which is how the Portenta's 3.0 V / 3.3 V bucks run. On a DVS-enabled buck those DVS-disabled codes would have meant 0.6875 V. The bucks run at their OTP set points.

Register 0x50 (LDO2_CTRL commit) is intentionally last in this table.

kPortentaH7DefaultName

constexpr const char* pf1550::profiles::kPortentaH7DefaultName = "portenta_h7_default"

inlineconstexpr

Human-readable profile identifier for logging and HAL binding.