PF1550 Driver
API reference
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pf1550_registers.hpp
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1
25#pragma once
26
27#include <cstdint>
28
29namespace pf1550 {
30
32inline constexpr uint8_t kDefaultI2cAddress = 0x08;
33
35inline constexpr uint8_t kExpectedDeviceId = 0x7C;
36
38inline constexpr uint16_t kVsnvsMillivolts = 3000;
39
41inline constexpr uint8_t kChargerPageBase = 0x80;
42
51enum class Register : uint8_t {
52 // --- §12.1 — identity & metadata ---
53 DeviceId = 0x00,
54 OtpFlavor = 0x01,
55 SiliconRev = 0x02,
56
57 // --- §12.1 — top-level interrupt category mask ---
58 IntCategory = 0x06,
59
60 // --- §12.1 — switching regulator interrupt status / mask / sense ---
61 SwIntStat0 = 0x08,
62 SwIntMask0 = 0x09,
63 SwIntSense0 = 0x0A,
64 SwIntStat1 = 0x0B,
65 SwIntMask1 = 0x0C,
66 SwIntSense1 = 0x0D,
67 SwIntStat2 = 0x0E,
68 SwIntMask2 = 0x0F,
69 SwIntSense2 = 0x10,
70
71 // --- §12.1 — LDO fault / temperature / ONKEY / MISC ---
72 LdoIntStat0 = 0x18,
73 LdoIntMask0 = 0x19,
74 LdoIntSense0 = 0x1A,
75
76 TempIntStat0 = 0x20,
77 TempIntMask0 = 0x21,
78 TempIntSense0 = 0x22,
79
80 OnKeyIntStat0 = 0x24,
81 OnKeyIntMask0 = 0x25,
82 OnKeyIntSense0 = 0x26,
83
84 MiscIntStat0 = 0x28,
85 MiscIntMask0 = 0x29,
86 MiscIntSense0 = 0x2A,
87
88 CoinCellCtrl = 0x30,
89
90 // --- §12.1 — Switch 1 (SW1 / BUCK1) ---
91 Sw1Volt = 0x32,
92 Sw1StbyVolt = 0x33,
93 Sw1SlpVolt = 0x34,
94 Sw1Ctrl = 0x35,
95 Sw1Ctrl1 = 0x36,
96
97 // --- §12.1 — Switch 2 (SW2 / BUCK2) ---
98 Sw2Volt = 0x38,
99 Sw2StbyVolt = 0x39,
100 Sw2SlpVolt = 0x3A,
101 Sw2Ctrl = 0x3B,
102 Sw2Ctrl1 = 0x3C,
103
104 // --- §12.1 — Switch 3 (SW3 / BUCK3) ---
105 Sw3Volt = 0x3E,
106 Sw3StbyVolt = 0x3F,
107 Sw3SlpVolt = 0x40,
108 Sw3Ctrl = 0x41,
109 Sw3Ctrl1 = 0x42,
110
111 // --- §12.1 — VSNVS / VREFDDR ---
112 VsnvsCtrl = 0x48,
113 VrefDdrCtrl = 0x4A,
114
115 // --- §12.1 — LDOs ---
116 Ldo1Volt = 0x4C,
117 Ldo1Ctrl = 0x4D,
118 Ldo2Volt = 0x4F,
119 Ldo2Ctrl = 0x50,
120 Ldo3Volt = 0x52,
121 Ldo3Ctrl = 0x53,
122
123 // --- §12.1 — Power-control / debounce ---
124 PwrCtrl0 = 0x58,
125 PwrCtrl1 = 0x59,
126 PwrCtrl2 = 0x5A,
127 PwrCtrl3 = 0x5B,
128
129 // --- §12.1 — Power-down sequencing ---
130 Sw1PwrDnSeq = 0x5F,
131 Sw2PwrDnSeq = 0x60,
132 Sw3PwrDnSeq = 0x61,
133 Ldo1PwrDnSeq = 0x62,
134 Ldo2PwrDnSeq = 0x63,
135 Ldo3PwrDnSeq = 0x64,
136 VrefDdrPwrDnSeq = 0x65,
137
138 // --- §12.1 — Machine state / addressing / clock ---
139 StateInfo = 0x67,
140 I2cAddrReg = 0x68,
141 Rc16Mhz = 0x6B,
142
143 // --- §12.1 — OTP indirect read ---
144 OtpKey1 = 0x6F,
145 ChargerLedDuty = 0x9C,
146 OtpKey2 = 0x9F,
147 ChargerLedCtrl = 0x9E,
148 VbusInCurrentLimit = 0x94,
149 FmrAddr = 0xC4,
150 FmrData = 0xC5,
151 TestRegKey3 = 0xDF,
152
153 // --- §12.2 — Charger sub-page (offset 0x80) ---
154 ChgInt = 0x80,
155 ChgIntMask = 0x82,
156 ChgIntOk = 0x84,
157 VbusSns = 0x86,
158 ChgSense = 0x87,
159};
160
165 static constexpr uint8_t kChg = 1u << 0;
166 static constexpr uint8_t kSw1 = 1u << 1;
167 static constexpr uint8_t kSw2 = 1u << 2;
168 static constexpr uint8_t kSw3 = 1u << 3;
169 static constexpr uint8_t kLdo = 1u << 4;
170 static constexpr uint8_t kOnKey = 1u << 5;
171 static constexpr uint8_t kTemp = 1u << 6;
172 static constexpr uint8_t kMisc = 1u << 7;
173};
174
182 static constexpr uint8_t kSw1Ls = 1u << 0;
183 static constexpr uint8_t kSw2Ls = 1u << 1;
184 static constexpr uint8_t kSw3Ls = 1u << 2;
185};
186
190 static constexpr uint8_t kSw1Hs = 1u << 0;
191 static constexpr uint8_t kSw2Hs = 1u << 1;
192 static constexpr uint8_t kSw3Hs = 1u << 2;
193};
194
197 static constexpr uint8_t kLdo1Fault = 1u << 0;
198 static constexpr uint8_t kLdo2Fault = 1u << 1;
199 static constexpr uint8_t kLdo3Fault = 1u << 2;
200};
201
204 static constexpr uint8_t kTherm110 = 1u << 0;
205 static constexpr uint8_t kTherm125 = 1u << 2;
206 static constexpr uint8_t kTempWarn = kTherm110;
207 static constexpr uint8_t kTempShdn = kTherm125;
208};
209
212 static constexpr uint8_t kPwrUp = 1u << 0;
213 static constexpr uint8_t kPwrDn = 1u << 1;
214 static constexpr uint8_t kPwrOn = 1u << 2;
215 static constexpr uint8_t kLowSysWarn = 1u << 3;
216 static constexpr uint8_t kSysOvlo = 1u << 4;
217 static constexpr uint8_t kVsysLow = kLowSysWarn;
218 static constexpr uint8_t kVsysOv = kSysOvlo;
220 [[deprecated("MISC_INT_STAT0 has no WDI bit (Table 108)")]] static constexpr uint8_t kWdiAssert = 0;
222 [[deprecated("MISC_INT_STAT0 has no RESETBMCU bit (Table 108)")]] static constexpr uint8_t kResetBmcu = 0;
223};
224
226enum class PmicState : uint8_t {
227 Wait = 0b000000,
228 Run = 0b001100,
229 Standby = 0b001101,
230 Sleep = 0b001110,
231 RegsDisable = 0b101011,
232 Unknown = 0xFF,
233};
234
236enum class ChargerState : uint8_t {
237 PreCharge = 0,
238 FastCC = 1,
239 FastCV = 2,
240 EndOfCharge = 3,
241 Done = 4,
242 TimerFault = 6,
243 ThermSuspend = 7,
244 Off = 8,
245 BatteryOv = 9,
246 TempShutdown = 10,
247 LinearOnly = 12,
248 Unknown = 0xFF,
249};
250
265enum class SwVoltageCode : uint8_t {
266 V1_1 = 0x00,
267 V2_5 = 0x05,
268 V3_0 = 0x06,
269 V3_3 = 0x07,
270 V3_1 = 0x0D,
271};
272
274enum class LdoVoltageCode : uint8_t {
275 V1_0 = 0x05,
276 V1_2 = 0x09,
277 V1_8 = 0x00,
278};
279
293 static constexpr uint8_t kEn = 1u << 0;
294 static constexpr uint8_t kStbyEn = 1u << 1;
295 static constexpr uint8_t kOMode = 1u << 2;
296 static constexpr uint8_t kLpwr = 1u << 3;
297 static constexpr uint8_t kDvsSpeed = 1u << 4;
298 static constexpr uint8_t kFpwmInDvs = 1u << 5;
299 static constexpr uint8_t kFpwm = 1u << 6;
300 static constexpr uint8_t kRdisEnb = 1u << 7;
301};
302
307 static constexpr uint8_t kEn = 1u << 0;
308 static constexpr uint8_t kStbyEn = 1u << 1;
309 static constexpr uint8_t kOMode = 1u << 2;
310 static constexpr uint8_t kLpwr = 1u << 3;
311 static constexpr uint8_t kLsEn = 1u << 4;
312};
313
316 static constexpr uint8_t kKey1Reg = static_cast<uint8_t>(Register::OtpKey1);
317 static constexpr uint8_t kKey1Val = 0x15;
318 static constexpr uint8_t kKey2Reg = static_cast<uint8_t>(Register::OtpKey2);
319 static constexpr uint8_t kKey2Val = 0x50;
320 static constexpr uint8_t kKey3Reg = static_cast<uint8_t>(Register::TestRegKey3);
321 static constexpr uint8_t kKey3Val = 0xAB;
322};
323
325struct OtpRegion {
326 static constexpr uint8_t kStart = 0x1C;
327 static constexpr uint8_t kEndExclusive = 0x37;
328};
329
330} // namespace pf1550
Definition pf1550.hpp:40
Register
Symbolic register addresses used by the PF1550 driver.
Definition pf1550_registers.hpp:51
@ Sw1PwrDnSeq
SW1_PWRDN_SEQ.
@ MiscIntSense0
MISC_INT_SENSE0.
@ ChgSense
CHG_SNS — Table 154. Charger mode (precharge, fast-cc, fast-cv, eoc …).
@ SwIntStat1
SW_INT_STAT1 — high-side current limits.
@ Ldo1PwrDnSeq
LDO1_PWRDN_SEQ.
@ Ldo3Volt
LDO3_VOLT.
@ Sw3Ctrl
SW3_CTRL.
@ OnKeyIntMask0
ONKEY_INT_MASK0.
@ VrefDdrPwrDnSeq
VREFDDR_PWRDN_SEQ.
@ LdoIntStat0
LDO_INT_STAT0 — Table 99. LDO1/2/3 current-limit faults.
@ Sw3Ctrl1
SW3_CTRL1 — Table 126. SW3_ILIM[1:0] + SW3_TMODE_SEL (Portenta writes 0x02 = 1.5 A typical).
@ MiscIntStat0
MISC_INT_STAT0 — Table 108. PWRON / VSYS / RESETBMCU events.
@ PwrCtrl1
PWRCTRL1 — PWRONDBNC, ONKEYDBNC, PWRONRSTEN, RESTARTEN, REGSCPEN.
@ Sw2SlpVolt
SW2_SLP_VOLT.
@ Sw1SlpVolt
SW1_SLP_VOLT — SLEEP-mode voltage.
@ PwrCtrl3
PWRCTRL3 — sequence delay etc.
@ PwrCtrl2
PWRCTRL2 — WDI_EN, WDI_POL etc.
@ SwIntStat2
SW_INT_STAT2 — DVS done.
@ Sw2Ctrl1
SW2_CTRL1 — SW2_ILIM[1:0].
@ Ldo2Volt
LDO2_VOLT.
@ Sw2StbyVolt
SW2_STBY_VOLT.
@ SwIntSense0
SW_INT_SENSE0.
@ FmrData
FRMDATA — OTP indirect data.
@ Ldo2PwrDnSeq
LDO2_PWRDN_SEQ.
@ Sw2PwrDnSeq
SW2_PWRDN_SEQ.
@ Ldo1Ctrl
LDO1_CTRL.
@ Sw3SlpVolt
SW3_SLP_VOLT.
@ LdoIntMask0
LDO_INT_MASK0.
@ Ldo1Volt
LDO1_VOLT.
@ Sw2Volt
SW2_VOLT — Table 117.
@ PwrCtrl0
PWRCTRL0 — STANDBYDLY, STANDBYINV, POR_DLY, TGRESET.
@ FmrAddr
FMRADDR — OTP indirect address.
@ SwIntStat0
SW_INT_STAT0 — low-side current limits (SW1/2/3).
@ TempIntMask0
TEMP_INT_MASK0.
@ StateInfo
STATE_INFO — Table 146. STATE[5:0] = Wait/RUN/STANDBY/SLEEP/REGS_DISABLE.
@ LdoIntSense0
LDO_INT_SENSE0.
@ Sw2Ctrl
SW2_CTRL — Table 120.
@ Sw3Volt
SW3_VOLT — Table 122.
@ Sw1StbyVolt
SW1_STBY_VOLT — STANDBY-mode voltage.
@ ChgIntMask
CHG_INT_MASK.
@ CoinCellCtrl
COINCELL_CONTROL — Table 111. LICELL charging configuration.
@ SwIntMask2
SW_INT_MASK2.
@ I2cAddrReg
I2C_ADDR — Table 147 (read-only, OTP-driven).
@ OnKeyIntSense0
ONKEY_INT_SENSE0.
@ Ldo3PwrDnSeq
LDO3_PWRDN_SEQ.
@ OtpFlavor
OTP_FLAVOR — Table 87. 0x00 = OTP not burned (A0EP).
@ ChgInt
CHG_INT — Table 150. SUP_I/BAT2SOC_I/CHGREV_I/CHG_I.
@ Sw1Ctrl
SW1_CTRL — EN/STBY_EN/OMODE/LPWR/DVSSPEED/FPWM/RDIS_ENB.
@ SwIntMask0
SW_INT_MASK0.
@ TestRegKey3
TEST_REG_KEY3 — third OTP unlock key (write 0xAB).
@ ChgIntOk
CHG_INT_OK — Table 152. CHG_OK, BATT_OK, VBUS_OK.
@ Sw3StbyVolt
SW3_STBY_VOLT.
@ Ldo3Ctrl
LDO3_CTRL.
@ Sw3PwrDnSeq
SW3_PWRDN_SEQ.
@ TempIntSense0
TEMP_INT_SENSE0.
@ VrefDdrCtrl
VREFDDR_CTRL — Table 128. DDR reference (unused on Portenta).
@ SwIntSense1
SW_INT_SENSE1.
@ IntCategory
INT_CATEGORY — Table 89. CHG/SW1/SW2/SW3/LDO/ONKEY/TEMP/MISC summary.
@ Sw1Volt
SW1_VOLT — RUN-mode voltage code (Table 31).
@ ChargerLedCtrl
LED_CNFG — Table 172. LEDOVRD, LED_CFG, current, frequency (Portenta writes 0x20).
@ ChargerLedDuty
LED_PWM — Table 170. LED_EN, LED_RAMP, LED_PWM[5:0] duty (Portenta writes 0x80).
@ SiliconRev
SILICON_REV — Table 88. Metal/full-layer/fab-fin identifiers.
@ DeviceId
DEVICE_ID — Table 86. Bits[2:0] = family, [7:3] = 01111 for PF1550.
@ Ldo2Ctrl
LDO2_CTRL — must be written last in Portenta profile.
@ OtpKey2
KEY2 unlock (write 0x50).
@ OnKeyIntStat0
ONKEY_INT_STAT0 — Table 105. Push / 1s/2s/3s/4s/8s long-press.
@ VbusSns
VBUS_SNS — Table 153. VBUS_VALID, DPM_SNS, OVLO, UVLO.
@ SwIntSense2
SW_INT_SENSE2.
@ OtpKey1
KEY1 unlock (write 0x15).
@ VsnvsCtrl
VSNVS_CTRL — Table 127. RTC/SNVS backup LDO control.
@ TempIntStat0
TEMP_INT_STAT0 — Table 102. Junction-temperature events.
@ VbusInCurrentLimit
VBUS input current limit ((mA/50) << 3 — Portenta uses 1500 mA → 0xA0).
@ MiscIntMask0
MISC_INT_MASK0.
@ Rc16Mhz
RC_16MHZ — 16 MHz clock force, analog core overrides.
@ SwIntMask1
SW_INT_MASK1.
@ Sw1Ctrl1
SW1_CTRL1 — SW1_ILIM[1:0] current limit + TMODE_SEL.
LdoVoltageCode
Common LDO output voltage codes used on Portenta H7 (Table 41).
Definition pf1550_registers.hpp:274
@ V1_2
1.200 V (LDO3)
@ V1_8
1.800 V (LDO2 — code 0)
@ V1_0
1.000 V (LDO1)
constexpr uint8_t kExpectedDeviceId
Expected DEVICE_ID[2:0] family identifier (PF1550 family = 100b).
Definition pf1550_registers.hpp:35
constexpr uint8_t kDefaultI2cAddress
Default 7-bit I²C slave address (settable via OTP — see Table 147).
Definition pf1550_registers.hpp:32
PmicState
STATE_INFO[5:0] values (Reg 0x67) describing the PMIC state machine.
Definition pf1550_registers.hpp:226
@ Wait
Wait / start-up before regulators are sequenced.
@ RegsDisable
REGS_DISABLE — all regulators off (post PWRON long-press).
@ Sleep
SLEEP / LPSR — minimal regulators.
constexpr uint16_t kVsnvsMillivolts
VSNVS output voltage: fixed 3.0 V (VSNVS_CTRL has no voltage field, Table 127).
Definition pf1550_registers.hpp:38
ChargerState
CHG_SNS[3:0] values (Reg 0x87) describing the charger sub-state.
Definition pf1550_registers.hpp:236
@ LinearOnly
Linear-only mode, no charge.
@ TempShutdown
Off because TJ > TSHDN.
@ FastCC
Fast-charge constant-current.
@ ThermSuspend
Thermistor suspend.
@ PreCharge
Precharge mode (V_BATT < V_PRECHG.LB).
@ EndOfCharge
End-of-charge (I_BAT = I_EOC).
@ Off
Input invalid or charger disabled.
@ BatteryOv
Battery overvoltage.
@ TimerFault
Timer fault.
@ Done
Done — battery full.
@ FastCV
Fast-charge constant-voltage.
SwVoltageCode
Common SW buck output voltage codes (RUN mode).
Definition pf1550_registers.hpp:265
@ V1_1
1.100 V (datasheet base)
@ V3_1
SW3 Table 37 code for 3.100 V (SW3 is OTP-loaded, read-only; SW1/SW2 decode 0x0D as 3....
@ V3_0
3.000 V (SW1 RUN on Portenta carrier profile)
@ V2_5
2.500 V (Portenta STBY/SLP setting)
@ V3_3
3.300 V (SW2 RUN on Portenta — carrier +3V3)
constexpr uint8_t kChargerPageBase
Base offset for Section 12.2 charger sub-page (see datasheet §12.2).
Definition pf1550_registers.hpp:41
Bit positions within INT_CATEGORY (Reg 0x06).
Definition pf1550_registers.hpp:164
static constexpr uint8_t kSw2
SW2_INT — SW2 fault interrupt.
Definition pf1550_registers.hpp:167
static constexpr uint8_t kSw1
SW1_INT — SW1 fault interrupt.
Definition pf1550_registers.hpp:166
static constexpr uint8_t kChg
CHG_INT — any charger interrupt pending.
Definition pf1550_registers.hpp:165
static constexpr uint8_t kLdo
LDO_INT — any LDO fault.
Definition pf1550_registers.hpp:169
static constexpr uint8_t kMisc
MISC_INT — PWRON / RESETBMCU / VSYS / WDI.
Definition pf1550_registers.hpp:172
static constexpr uint8_t kTemp
TEMP_INT — die temperature events.
Definition pf1550_registers.hpp:171
static constexpr uint8_t kOnKey
ONKEY_INT — push-button events.
Definition pf1550_registers.hpp:170
static constexpr uint8_t kSw3
SW3_INT — SW3 fault interrupt.
Definition pf1550_registers.hpp:168
Bit positions within LDOn_CTRL (0x4D / 0x50 / 0x53).
Definition pf1550_registers.hpp:306
static constexpr uint8_t kEn
VLDO_EN — enable in RUN.
Definition pf1550_registers.hpp:307
static constexpr uint8_t kLpwr
VLDO_LPWR — low-power in STBY/SLP.
Definition pf1550_registers.hpp:310
static constexpr uint8_t kLsEn
LDOn_LS_EN — load-switch mode (irreversible 0→1).
Definition pf1550_registers.hpp:311
static constexpr uint8_t kStbyEn
VLDO_STBY_EN — enable in STANDBY.
Definition pf1550_registers.hpp:308
static constexpr uint8_t kOMode
VLDO_OMODE — enable in SLEEP.
Definition pf1550_registers.hpp:309
Bit positions within LDO_INT_STAT0 (Reg 0x18) — LDO current-limit faults.
Definition pf1550_registers.hpp:196
static constexpr uint8_t kLdo3Fault
LDO3 fault.
Definition pf1550_registers.hpp:199
static constexpr uint8_t kLdo2Fault
LDO2 fault.
Definition pf1550_registers.hpp:198
static constexpr uint8_t kLdo1Fault
LDO1 fault.
Definition pf1550_registers.hpp:197
Bit positions within MISC_INT_STAT0 (Reg 0x28, Table 108). Bits 7:5 are unused.
Definition pf1550_registers.hpp:211
static constexpr uint8_t kLowSysWarn
LOW_SYS_WARN_I — VSYS crossed the LOW_SYS_WARN threshold.
Definition pf1550_registers.hpp:215
static constexpr uint8_t kSysOvlo
SYS_OVLO_I — VSYS crossed the SYS_OVLO threshold.
Definition pf1550_registers.hpp:216
static constexpr uint8_t kResetBmcu
The PF1550 has no RESETBMCU interrupt bit; kept (as 0, never matches) for source compatibility.
Definition pf1550_registers.hpp:222
static constexpr uint8_t kPwrUp
PWRUP_I — STANDBY/SLEEP to RUN transition finished.
Definition pf1550_registers.hpp:212
static constexpr uint8_t kVsysOv
Definition pf1550_registers.hpp:218
static constexpr uint8_t kWdiAssert
The PF1550 has no WDI interrupt bit; kept (as 0, never matches) for source compatibility.
Definition pf1550_registers.hpp:220
static constexpr uint8_t kVsysLow
Alias of kLowSysWarn.
Definition pf1550_registers.hpp:217
static constexpr uint8_t kPwrDn
PWRDN_I — RUN to STANDBY/SLEEP transition finished.
Definition pf1550_registers.hpp:213
static constexpr uint8_t kPwrOn
PWRON_I — power-on button event.
Definition pf1550_registers.hpp:214
OTP memory indirect address range (via FMRADDR/FMRDATA).
Definition pf1550_registers.hpp:325
static constexpr uint8_t kEndExclusive
One past the last OTP byte address.
Definition pf1550_registers.hpp:327
static constexpr uint8_t kStart
First OTP byte address.
Definition pf1550_registers.hpp:326
OTP indirect-read unlock sequence (Section 12.x KEY1 / KEY2 / KEY3).
Definition pf1550_registers.hpp:315
static constexpr uint8_t kKey3Val
Definition pf1550_registers.hpp:321
static constexpr uint8_t kKey2Reg
Definition pf1550_registers.hpp:318
static constexpr uint8_t kKey1Val
Definition pf1550_registers.hpp:317
static constexpr uint8_t kKey1Reg
Definition pf1550_registers.hpp:316
static constexpr uint8_t kKey3Reg
Definition pf1550_registers.hpp:320
static constexpr uint8_t kKey2Val
Definition pf1550_registers.hpp:319
Bit positions within SWn_CTRL (e.g. 0x35 / 0x3B / 0x41).
Definition pf1550_registers.hpp:292
static constexpr uint8_t kStbyEn
SW_STBY_EN — enable in STANDBY.
Definition pf1550_registers.hpp:294
static constexpr uint8_t kFpwmInDvs
SW_FPWM_IN_DVS — CCM during DVS-down.
Definition pf1550_registers.hpp:298
static constexpr uint8_t kLpwr
SW_LPWR — low-power during STBY/SLP.
Definition pf1550_registers.hpp:296
static constexpr uint8_t kOMode
SW_OMODE — enable in SLEEP.
Definition pf1550_registers.hpp:295
static constexpr uint8_t kEn
SW_EN — enable in RUN.
Definition pf1550_registers.hpp:293
static constexpr uint8_t kFpwm
SW_FPWM — force CCM.
Definition pf1550_registers.hpp:299
static constexpr uint8_t kDvsSpeed
SW_DVSSPEED — slow DVS slew.
Definition pf1550_registers.hpp:297
static constexpr uint8_t kRdisEnb
SW_RDIS_ENB — disable discharge resistor.
Definition pf1550_registers.hpp:300
Bit positions within SW_INT_STAT0 (Reg 0x08) — low-side current-limit faults.
Definition pf1550_registers.hpp:181
static constexpr uint8_t kSw3Ls
SW3_LS_I — SW3 low-side current limit.
Definition pf1550_registers.hpp:184
static constexpr uint8_t kSw2Ls
SW2_LS_I — SW2 low-side current limit.
Definition pf1550_registers.hpp:183
static constexpr uint8_t kSw1Ls
SW1_LS_I — SW1 low-side current limit (Table 90).
Definition pf1550_registers.hpp:182
Bit positions within SW_INT_STAT1 (Reg 0x0B, Table 93) — high-side current-limit faults....
Definition pf1550_registers.hpp:189
static constexpr uint8_t kSw2Hs
SW2_HS_I — SW2 high-side current limit.
Definition pf1550_registers.hpp:191
static constexpr uint8_t kSw1Hs
SW1_HS_I — SW1 high-side current limit.
Definition pf1550_registers.hpp:190
static constexpr uint8_t kSw3Hs
SW3_HS_I — SW3 high-side current limit.
Definition pf1550_registers.hpp:192
Bit positions within TEMP_INT_STAT0 (Reg 0x20, Table 102). Bit 1 is unused.
Definition pf1550_registers.hpp:203
static constexpr uint8_t kTherm110
THERM110I — die temperature crossed 110 °C (either way).
Definition pf1550_registers.hpp:204
static constexpr uint8_t kTempShdn
Alias of kTherm125 (the chip has no separate shutdown bit).
Definition pf1550_registers.hpp:207
static constexpr uint8_t kTherm125
THERM125I — die temperature crossed 125 °C (either way).
Definition pf1550_registers.hpp:205
static constexpr uint8_t kTempWarn
Alias of kTherm110.
Definition pf1550_registers.hpp:206