FAULT register bit field definitions.
The FAULT register is 32-bit, read-only, and contains per-channel fault flags. Each fault type has an 8-bit field where bit N corresponds to channel N.
Register Layout
| Byte | Bits | Field | Description |
| 3 | 31:24 | OCP[7:0] | Per-channel overcurrent flags |
| 2 | 23:16 | HHF[7:0] | Per-channel HIT not reached flags |
| 1 | 15:8 | OLF[7:0] | Per-channel open-load flags |
| 0 | 7:0 | DPM[7:0] | Per-channel plunger movement flags |
Clearing Fault Flags
MAX22200: Reading the FAULT register clears all fault flags simultaneously.
MAX22200A (recommended): Selective clear on read. To clear a specific fault bit, read the FAULT register while keeping the corresponding SDI bit HIGH for the channel(s) to clear. Only the bits corresponding to HIGH SDI bits are cleared.
- Note
- Channel 0 corresponds to the LSB (bit 0) of each fault byte.
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Reading the FAULT register also deasserts the nFAULT pin (if no other faults are active).