CRTP-based template interface for SPI communication. More...

#include <cstddef>
#include <cstdint>

Classes
class	max22200::SpiInterface< Derived >
	CRTP-based template interface for SPI communication. More...

Namespaces
namespace	max22200

Enumerations
enum class	max22200::CtrlPin : uint8_t { max22200::ENABLE = 0 , max22200::FAULT , max22200::CMD }
	Identifies the hardware control pins of the MAX22200. More...

enum class	max22200::GpioSignal : uint8_t { max22200::INACTIVE = 0 , max22200::ACTIVE = 1 }
	Abstract signal level for control pins. More...

Detailed Description

CRTP-based template interface for SPI communication.

This file defines the hardware abstraction layer (HAL) interface for SPI communication and GPIO control required by the MAX22200 driver. Platform-specific implementations (e.g., ESP32, STM32) must inherit from SpiInterface and implement all pure virtual methods.

MAX22200 SPI Requirements

SPI Mode

Mode 0 only (CPOL=0, CPHA=0)
Clock idle LOW, data sampled on rising edge, output on falling edge

SPI Clock Speed

Standalone: Up to 10 MHz
Daisy-chain: Up to 5 MHz
Minimum clock period: 100ns (tCLK)

SPI Signals

SCK: SPI clock (input, internal pulldown)
CSB: Chip select (active-low, internal pullup)
SDI: Serial data in (MOSI, internal pulldown)
SDO: Serial data out (MISO, open-drain, requires external pullup)
CMD: Command mode select (must be controlled via GPIO)

CMD Pin Control

The CMD pin is critical for the two-phase SPI protocol:

HIGH: Command Register write mode (Phase 1)
LOW: Data register read/write mode (Phase 2)
Must be held HIGH during the rising edge of CSB for Command Register writes
Setup time: 20ns (tCMS) before CSB rising edge

ENABLE Pin Control

HIGH: Device enabled (normal operation)
LOW: Device disabled (sleep mode, < 11μA consumption)
Enable time (tEN): 0.5ms from rising edge to SPI ready

FAULT Pin Reading

Open-drain output (requires external pullup)
LOW: Fault condition present (active-low)
HIGH: No fault (or masked fault)

Classes

Namespaces

Enumerations