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HardFOC Flux V1 HAL
Unified HAL API for the HardFOC Flux valve-control platform (ESP32-S3)
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Enumerations | |
| enum class | SpiBus : uint8_t { Valve = 0 , Pressure = 1 } |
| Logical SPI buses on Flux V1 (binding slot index). More... | |
Functions | |
| constexpr bool | IsInputPin (HfFunctionalGpioPin pin) noexcept |
True when pin is in kInputPins. | |
| constexpr bool | IsValveEnablePin (HfFunctionalGpioPin pin) noexcept |
True when pin is in kValveEnablePins. | |
Variables | |
| constexpr uint8_t | kValveSpiController = 2 |
| ESP32-S3 SPI3_HOST. | |
| constexpr bool | kValveSpiUseIomux = false |
| GPIO matrix. | |
| constexpr uint8_t | kPressureSpiController = 1 |
| ESP32-S3 SPI2_HOST. | |
| constexpr bool | kPressureSpiUseIomux = true |
| IO MUX. | |
| constexpr uint32_t | kSpiTimeoutMs = 1000 |
| Per-transfer timeout, both buses. | |
| constexpr uint32_t | kMax22200SpiHz = 1'000'000 |
| constexpr uint8_t | kMax22200SpiMode = 0 |
| constexpr uint32_t | kTle92466SpiHz = 1'000'000 |
| constexpr uint8_t | kTle92466SpiMode = 1 |
| constexpr uint32_t | kAds7952SpiHz = 4'000'000 |
| constexpr uint8_t | kAds7952SpiMode = 0 |
| constexpr uint32_t | kCanBitrate = 500'000 |
| TWAI nominal bit rate (bit/s) | |
| constexpr uint8_t | kStatusLedChannel = 0 |
| RMT channel of the WS2812 data line. | |
| constexpr uint16_t | kStatusLedCount = 1 |
| LEDs on the strip. | |
| constexpr HfFunctionalGpioPin | kInputPins [] |
| Pins that are inputs on Flux V1: the open-drain fault outputs of the two valve drivers. | |
| constexpr HfFunctionalGpioPin | kValveEnablePins [] |
| The valve-bank enable outputs (MAX22200 ENABLE, TLE92466ED EN), active high. | |
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Logical SPI buses on Flux V1 (binding slot index).
| Enumerator | |
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| Valve | MAX22200 + TLE92466ED (pin map: SPI2_*) |
| Pressure | ADS7952 pressure ADC, dedicated (pin map: SPI3_*) |
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TWAI nominal bit rate (bit/s)
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Pins that are inputs on Flux V1: the open-drain fault outputs of the two valve drivers.
GpioManager creates them as inputs from the first instruction, so the MCU never drives a chip's FAULT_N line, not even for the moment between pin creation and the valve manager's bring-up.
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ESP32-S3 SPI2_HOST.
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IO MUX.
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Per-transfer timeout, both buses.
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RMT channel of the WS2812 data line.
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LEDs on the strip.
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The valve-bank enable outputs (MAX22200 ENABLE, TLE92466ED EN), active high.
Driving either low de-energises its whole bank in hardware, without SPI. GpioManager creates them driven inactive (low), so both banks are off until the valve manager's bring-up raises them; ValveManager::DropEnablePins() drives them low again.
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ESP32-S3 SPI3_HOST.
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GPIO matrix.