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HardFOC Flux V1 HAL
Unified HAL API for the HardFOC Flux valve-control platform (ESP32-S3)
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Flux V1 board wiring that is not in the pin map: bus controllers, clocks, modes, bit rates. More...
#include <cstdint>#include "core/hf-core-drivers/internal/hf-pincfg/src/hf_functional_pin_config_flux_v1.hpp"Go to the source code of this file.
Namespaces | |
| namespace | flux |
| namespace | flux::board |
Enumerations | |
| enum class | flux::board::SpiBus : uint8_t { flux::board::Valve = 0 , flux::board::Pressure = 1 } |
| Logical SPI buses on Flux V1 (binding slot index). More... | |
Functions | |
| constexpr bool | flux::board::IsInputPin (HfFunctionalGpioPin pin) noexcept |
True when pin is in kInputPins. | |
| constexpr bool | flux::board::IsValveEnablePin (HfFunctionalGpioPin pin) noexcept |
True when pin is in kValveEnablePins. | |
Variables | |
| constexpr uint8_t | flux::board::kValveSpiController = 2 |
| ESP32-S3 SPI3_HOST. | |
| constexpr bool | flux::board::kValveSpiUseIomux = false |
| GPIO matrix. | |
| constexpr uint8_t | flux::board::kPressureSpiController = 1 |
| ESP32-S3 SPI2_HOST. | |
| constexpr bool | flux::board::kPressureSpiUseIomux = true |
| IO MUX. | |
| constexpr uint32_t | flux::board::kSpiTimeoutMs = 1000 |
| Per-transfer timeout, both buses. | |
| constexpr uint32_t | flux::board::kMax22200SpiHz = 1'000'000 |
| constexpr uint8_t | flux::board::kMax22200SpiMode = 0 |
| constexpr uint32_t | flux::board::kTle92466SpiHz = 1'000'000 |
| constexpr uint8_t | flux::board::kTle92466SpiMode = 1 |
| constexpr uint32_t | flux::board::kAds7952SpiHz = 4'000'000 |
| constexpr uint8_t | flux::board::kAds7952SpiMode = 0 |
| constexpr uint32_t | flux::board::kCanBitrate = 500'000 |
| TWAI nominal bit rate (bit/s) | |
| constexpr uint8_t | flux::board::kStatusLedChannel = 0 |
| RMT channel of the WS2812 data line. | |
| constexpr uint16_t | flux::board::kStatusLedCount = 1 |
| LEDs on the strip. | |
| constexpr HfFunctionalGpioPin | flux::board::kInputPins [] |
| Pins that are inputs on Flux V1: the open-drain fault outputs of the two valve drivers. | |
| constexpr HfFunctionalGpioPin | flux::board::kValveEnablePins [] |
| The valve-bank enable outputs (MAX22200 ENABLE, TLE92466ED EN), active high. | |
Flux V1 board wiring that is not in the pin map: bus controllers, clocks, modes, bit rates.
The functional pin map (hf-pincfg hf_functional_pin_config_flux_v1.hpp) says which GPIO carries which signal. This header holds the rest of the board's bus facts, as plain constants with no MCU header: which SPI controller each bus uses, the clock and mode of each chip select, the CAN bit rate and the status LED. CommChannelsManager and LedManager turn them into flux::bsp specs. A board revision changes this file and the pin map, not the managers.
Ownership: constants only. Thread safety: constexpr; no state.