Concrete SPI communication adapter for TMC9660 using BaseSpi and BaseGpio. More...

#include <Tmc9660Handler.h>

Inheritance diagram for HalSpiTmc9660Comm:

Public Member Functions
	HalSpiTmc9660Comm (BaseSpi &spi, BaseGpio &rst, BaseGpio &drv_en, BaseGpio &faultn, BaseGpio &wake, bool rst_active_high=true, bool drv_en_active_high=true, bool faultn_active_low=false, bool wake_active_low=false) noexcept
	Construct the SPI communication adapter.

uint32_t	transportDiag () const noexcept
	Last BaseSpi error observed by any TMCL/bootloader transfer.

uint32_t	rawTmclProbe (std::array< uint8_t, 8 > &tx, std::array< uint8_t, 8 > &rx, uint32_t timeout_ms) noexcept
	Single-shot raw 8-byte transfer with caller-chosen bus-lock timeout.

CRTP-Required Methods
These are called by tmc9660::SpiCommInterface<HalSpiTmc9660Comm> via static dispatch.
bool	spiTransferTMCL (std::array< uint8_t, 8 > &tx, std::array< uint8_t, 8 > &rx) noexcept
	Perform an 8-byte full-duplex SPI transfer for TMCL parameter mode.

bool	hostSpiTransferTMCLPair (std::array< uint8_t, 8 > &tx1, std::array< uint8_t, 8 > &rx1, std::array< uint8_t, 8 > &tx2, std::array< uint8_t, 8 > &rx2, uint32_t gap_us) noexcept
	Two TMCL soft-CS frames under one bus lock (cmd + NO_OP / reply).

bool	spiTransferBootloader (std::array< uint8_t, 5 > &tx, std::array< uint8_t, 5 > &rx) noexcept
	Perform a 5-byte full-duplex SPI transfer for bootloader mode.

bool	gpioSet (tmc9660::TMC9660CtrlPin pin, tmc9660::GpioSignal signal) noexcept
	Set a TMC9660 control pin to a given logical signal state.

bool	gpioRead (tmc9660::TMC9660CtrlPin pin, tmc9660::GpioSignal &signal) noexcept
	Read a TMC9660 control pin's current logical signal state.

void	debugLog (int level, const char tag, const char format, va_list args) noexcept
	Route TMC9660 driver debug output to the HardFOC Logger.

void	delayMs (uint32_t ms) noexcept
	Delay execution for the specified number of milliseconds.

void	delayUs (uint32_t us) noexcept
	Delay execution for the specified number of microseconds.

Private Attributes
BaseSpi &	spi_
	SPI bus interface (not owned).

Tmc9660CtrlPins	ctrl_pins_
	Host-side control pin references.

uint32_t	last_spi_err_ {0}
	Last hf_spi_err_t from Transfer/TransferChain.

Detailed Description

Concrete SPI communication adapter for TMC9660 using BaseSpi and BaseGpio.

Implements all methods required by tmc9660::SpiCommInterface<HalSpiTmc9660Comm> through the CRTP (Curiously Recurring Template Pattern). This class acts as the bridge between the HardFOC BaseSpi abstraction and the TMC9660 driver's SPI protocol, handling:

TMCL transfers: 8-byte full-duplex SPI exchanges for parameter mode
Bootloader transfers: 5-byte full-duplex SPI exchanges for bootloader mode
GPIO control: Maps TMC9660 control pin identifiers (RST, DRV_EN, FAULTN, WAKE) to physical BaseGpio instances with configurable active-level polarity
Timing: Platform-aware delays (millisecond via RTOS, microsecond via esp_rom_delay_us or busy-wait fallback)
Logging: Routes TMC9660 driver debug output to the HardFOC Logger

Control Pin Polarity

Each control pin can be configured as active-high or active-low to match the board's electrical design (e.g., inverting buffers). The constructor parameters set the initial polarity; the base class provides set_pin_active_level() for runtime reconfiguration if needed.

Note: This class does NOT own the BaseSpi or BaseGpio instances; they must remain valid for the lifetime of this object.

See also: tmc9660::SpiCommInterface CRTP base class from the TMC9660 driver; HalUartTmc9660Comm UART equivalent of this class

Constructor & Destructor Documentation

◆ HalSpiTmc9660Comm()

HalSpiTmc9660Comm::HalSpiTmc9660Comm	(	BaseSpi &	spi,
		BaseGpio &	rst,
		BaseGpio &	drv_en,
		BaseGpio &	faultn,
		BaseGpio &	wake,
		bool	rst_active_high = `true`,
		bool	drv_en_active_high = `true`,
		bool	faultn_active_low = `false`,
		bool	wake_active_low = `false`
	)

noexcept

Construct the SPI communication adapter.

Parameters

spi	Reference to a pre-configured BaseSpi implementation (SPI mode 3, 8-bit frames, chip select managed externally).
rst	BaseGpio connected to TMC9660 RST (pin 22). Must be pre-configured as output.
drv_en	BaseGpio connected to TMC9660 DRV_EN (pin 21). Must be pre-configured as output.
faultn	BaseGpio connected to TMC9660 FAULTN (pin 20). Must be pre-configured as input.
wake	BaseGpio connected to TMC9660 WAKE (pin 19). Must be pre-configured as output.
rst_active_high	Physical GPIO level when RST is ACTIVE (default: true = HIGH).
drv_en_active_high	Physical GPIO level when DRV_EN is ACTIVE (default: true = HIGH).
faultn_active_low	true if FAULTN ACTIVE is physical LOW (ESP/PCAL nFLT).
wake_active_low	true if WAKE ACTIVE is physical LOW (ESP/PCAL nWK). Mapped to CommInterface as !flag (active_level).

Member Function Documentation

◆ debugLog()

void HalSpiTmc9660Comm::debugLog	(	int	level,
		const char *	tag,
		const char *	format,
		va_list	args
	)

noexcept

Route TMC9660 driver debug output to the HardFOC Logger.

Parameters

level	Log level (0=Error, 1=Warning, 2=Info, 3=Debug).
tag	Log tag string for categorization.
format	printf-style format string.
args	Variable argument list.

◆ delayMs()

void HalSpiTmc9660Comm::delayMs ( uint32_t ms )

noexcept

Delay execution for the specified number of milliseconds.

Parameters

ms	Milliseconds to delay (delegates to os_delay_msec).

◆ delayUs()

void HalSpiTmc9660Comm::delayUs ( uint32_t us )

noexcept

Delay execution for the specified number of microseconds.

On ESP32, uses esp_rom_delay_us() for accurate sub-millisecond timing. On other platforms, uses a busy-wait loop based on the processor cycle counter.

Parameters

us	Microseconds to delay.

◆ gpioRead()

bool HalSpiTmc9660Comm::gpioRead	(	tmc9660::TMC9660CtrlPin	pin,
		tmc9660::GpioSignal &	signal
	)

noexcept

Read a TMC9660 control pin's current logical signal state.

Reads the physical GPIO level via BaseGpio, then translates to ACTIVE/INACTIVE based on the pin's configured active-level polarity.

Parameters

	pin	Which control pin to read (typically FAULTN for fault status).
[out]	signal	Current logical signal state.

Returns: true if the GPIO read succeeded.

◆ gpioSet()

bool HalSpiTmc9660Comm::gpioSet	(	tmc9660::TMC9660CtrlPin	pin,
		tmc9660::GpioSignal	signal
	)

noexcept

Set a TMC9660 control pin to a given logical signal state.

Translates the logical ACTIVE/INACTIVE signal to a physical HIGH/LOW level based on the pin's configured active-level polarity, then writes via BaseGpio.

Parameters

pin	Which control pin to set (RST, DRV_EN, FAULTN, WAKE).
signal	Desired logical signal state.

Returns: true if the GPIO write succeeded.

◆ hostSpiTransferTMCLPair()

bool HalSpiTmc9660Comm::hostSpiTransferTMCLPair	(	std::array< uint8_t, 8 > &	tx1,
		std::array< uint8_t, 8 > &	rx1,
		std::array< uint8_t, 8 > &	tx2,
		std::array< uint8_t, 8 > &	rx2,
		uint32_t	gap_us
	)

noexcept

Two TMCL soft-CS frames under one bus lock (cmd + NO_OP / reply).

CRTP name is hostSpi* so requires detection does not match an inherited default. Prevents Mode1 peers rewriting SPE/CPOL between halves (Mid HIL: OPENLOOP_VOLTAGE tmcl_st=56).

◆ rawTmclProbe()

uint32_t HalSpiTmc9660Comm::rawTmclProbe	(	std::array< uint8_t, 8 > &	tx,
		std::array< uint8_t, 8 > &	rx,
		uint32_t	timeout_ms
	)

noexcept

Single-shot raw 8-byte transfer with caller-chosen bus-lock timeout.

Returns: Numeric hf_spi_err_t (0 = success). Bench diagnostic only — no retry, no parse; discriminates lock starvation from a silent chip.

◆ spiTransferBootloader()

bool HalSpiTmc9660Comm::spiTransferBootloader	(	std::array< uint8_t, 5 > &	tx,
		std::array< uint8_t, 5 > &	rx
	)

noexcept

Perform a 5-byte full-duplex SPI transfer for bootloader mode.

Parameters

[in,out]	tx	5-byte transmit buffer (bootloader command).
[out]	rx	5-byte receive buffer (bootloader reply).

Returns: true if BaseSpi::Transfer() succeeded.

◆ spiTransferTMCL()

bool HalSpiTmc9660Comm::spiTransferTMCL	(	std::array< uint8_t, 8 > &	tx,
		std::array< uint8_t, 8 > &	rx
	)

noexcept

Perform an 8-byte full-duplex SPI transfer for TMCL parameter mode.

Parameters

[in,out]	tx	8-byte transmit buffer (TMCL command frame).
[out]	rx	8-byte receive buffer (TMCL reply frame).

Returns: true if BaseSpi::Transfer() succeeded.

◆ transportDiag()

uint32_t HalSpiTmc9660Comm::transportDiag ( ) const

inlinenoexcept

Last BaseSpi error observed by any TMCL/bootloader transfer.

Returns: Numeric hf_spi_err_t of the most recent transfer (0 = SPI_SUCCESS). Bench diagnostic: distinguishes bus-lock starvation (BUS_BUSY=7), HAL timeout (TRANSFER_TIMEOUT=12) from a silent chip (SUCCESS + zeros).

Member Data Documentation

◆ ctrl_pins_

Tmc9660CtrlPins HalSpiTmc9660Comm::ctrl_pins_

private

Host-side control pin references.

◆ last_spi_err_

uint32_t HalSpiTmc9660Comm::last_spi_err_ {0}

private

Last hf_spi_err_t from Transfer/TransferChain.

◆ spi_

BaseSpi& HalSpiTmc9660Comm::spi_

private

SPI bus interface (not owned).

The documentation for this class was generated from the following files:

Public Member Functions

Private Attributes

Detailed Description

Control Pin Polarity

Constructor & Destructor Documentation

◆ HalSpiTmc9660Comm()

Member Function Documentation

◆ debugLog()

◆ delayMs()

◆ delayUs()

◆ gpioRead()

◆ gpioSet()

◆ hostSpiTransferTMCLPair()

◆ rawTmclProbe()

◆ spiTransferBootloader()

◆ spiTransferTMCL()

◆ transportDiag()

Member Data Documentation

◆ ctrl_pins_

◆ last_spi_err_

◆ spi_