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HardFOC Core
API reference
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CRTP SPI communication adapter for TLE92466ED using BaseSpi and BaseGpio. More...
#include <Tle92466edHandler.h>
Public Member Functions | |
| HalSpiTle92466edComm (BaseSpi &spi, BaseGpio &resn, BaseGpio &en, BaseGpio *faultn=nullptr) noexcept | |
| Construct the SPI adapter. | |
CRTP-Required Methods | |
| tle92466ed::CommResult< void > | Init () noexcept |
| Reset pulse, assert EN, then SPI identity / fault clear. | |
| tle92466ed::CommResult< void > | Deinit () noexcept |
| Mark adapter deinitialized; does not change GPIO or SPI state. | |
| tle92466ed::CommResult< uint32_t > | Transfer32 (uint32_t tx_data) noexcept |
| Single 32-bit SPI frame (Mode 1, MSB first). | |
| tle92466ed::CommResult< void > | TransferMulti (std::span< const uint32_t > tx_data, std::span< uint32_t > rx_data) noexcept |
| Pipelined multi-frame SPI transfer under one SPI2 bus lock. | |
| tle92466ed::CommResult< void > | TransferMulti (std::span< const uint32_t > tx_data, std::span< uint32_t > rx_data, uint32_t gap_us) noexcept |
| TransferMulti with an explicit inter-frame CS-high gap. | |
| tle92466ed::CommResult< void > | Delay (uint32_t microseconds) noexcept |
| Busy-wait delay in microseconds (datasheet timing gaps). | |
| tle92466ed::CommResult< void > | Configure (const tle92466ed::SPIConfig &config) noexcept |
No-op; BaseSpi is pre-configured for Mode 1 / 32-bit frames. | |
| bool | IsReady () const noexcept |
| True after Init succeeded (GPIO polarity parked, SPI ready). | |
| tle92466ed::CommError | GetLastError () const noexcept |
| Last comm-layer error from Transfer32 or GPIO helpers. | |
| tle92466ed::CommResult< void > | ClearErrors () noexcept |
| Clear last_error_; does not clear chip fault registers. | |
| tle92466ed::CommResult< void > | GpioSet (tle92466ed::CtrlPin pin, tle92466ed::GpioSignal signal) noexcept |
| Drive RESN, EN, or FAULTN via configured BaseGpio active levels. | |
| tle92466ed::CommResult< tle92466ed::GpioSignal > | GpioRead (tle92466ed::CtrlPin pin) noexcept |
| Read RESN, EN, or FAULTN logical state. | |
| void | Log (tle92466ed::LogLevel level, const char *tag, const char *format, va_list args) noexcept |
| Route driver log lines to the HAL Logger. | |
| uint32_t | LastRxWord () const noexcept |
| Last 32-bit SPI RX word (bring-up / WrongDeviceID diagnostics). | |
| uint32_t | LastRxWordFirst () const noexcept |
| RX word from the FIRST frame of the last TransferMulti chain. | |
Private Attributes | |
| BaseSpi & | spi_ |
| BaseGpio & | resn_ |
| BaseGpio & | en_ |
| BaseGpio * | faultn_ |
| bool | initialized_ {false} |
| tle92466ed::CommError | last_error_ {tle92466ed::CommError::None} |
| uint32_t | last_rx_ {0} |
| uint32_t | last_rx_first_ {0} |
CRTP SPI communication adapter for TLE92466ED using BaseSpi and BaseGpio.
Implements all methods required by tle92466ed::SpiInterface<HalSpiTle92466edComm>.
Init holds EN LOW only for the RESN pulse, then asserts EN HIGH before the SPI identity read. Channel outputs remain gated by CH_CTRL after POR — EN high is not “outputs energized”. When EN/RESN are expander-backed, claim ownership of those pins before constructing this adapter.
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noexcept |
Construct the SPI adapter.
| spi | Reference to pre-configured BaseSpi (Mode 1, 32-bit frames). |
| resn | BaseGpio connected to RESN (reset, active LOW). |
| en | BaseGpio connected to EN (enable, active HIGH). |
| faultn | Optional BaseGpio connected to FAULTN (active LOW input). |
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noexcept |
Clear last_error_; does not clear chip fault registers.
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noexcept |
No-op; BaseSpi is pre-configured for Mode 1 / 32-bit frames.
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noexcept |
Mark adapter deinitialized; does not change GPIO or SPI state.
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noexcept |
Busy-wait delay in microseconds (datasheet timing gaps).
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noexcept |
Last comm-layer error from Transfer32 or GPIO helpers.
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noexcept |
Read RESN, EN, or FAULTN logical state.
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noexcept |
Drive RESN, EN, or FAULTN via configured BaseGpio active levels.
| pin | RESN (active LOW), EN (active HIGH), or FAULTN input. |
| signal | ACTIVE / INACTIVE in driver semantics, not raw pin voltage. |
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noexcept |
Reset pulse, assert EN, then SPI identity / fault clear.
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noexcept |
True after Init succeeded (GPIO polarity parked, SPI ready).
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inlinenoexcept |
Last 32-bit SPI RX word (bring-up / WrongDeviceID diagnostics).
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inlinenoexcept |
RX word from the FIRST frame of the last TransferMulti chain.
A register read is two CS windows and the reply is expected on the second. Keeping the first word lets bring-up tools prove which slot actually carried the reply instead of inferring it from a register that read back as zero.
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noexcept |
Route driver log lines to the HAL Logger.
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noexcept |
Single 32-bit SPI frame (Mode 1, MSB first).
| tx_data | Command or data word to shift out. |
20 µs between CS cycles; prefer TransferMulti for reads.
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noexcept |
Pipelined multi-frame SPI transfer under one SPI2 bus lock.
| tx_data | TX words (command frame followed by dummy frame(s) for reads). |
| rx_data | RX buffer, same length as tx_data. |
tx_data and rx_data must be equal length and non-empty. Releasing the bus between frames lets a peer consume this device's pipeline slot (sticky-zero reads).
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noexcept |
TransferMulti with an explicit inter-frame CS-high gap.
| gap_us | CS-high time between chained frames in microseconds; 0 selects the production default (5 µs, ≥ datasheet tCSN_TD). |
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