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HF-Core Platform 0.1.0-dev
Hardware-Agnostic Handler Layer & RTOS Utilities for HardFOC
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Centralized hardware pin and address configuration for hf-core tests. More...
#include <cstdint>Go to the source code of this file.
Centralized hardware pin and address configuration for hf-core tests.
All pin assignments, I2C addresses, SPI configurations, and ADC channels are defined here. Modify this single file to match your hardware setup.
Default pin assignments target the HardFOC Vortex v1 board with an ESP32-S3 module. Override any pin at compile time with -D flags: -D PIN_I2C_SDA=21 -D PIN_I2C_SCL=22
| #define AS5047U_SPI_CLOCK_HZ 1000000 |
| #define BNO08X_I2C_ADDR 0x4A |
| #define I2C_CLOCK_HZ 400000 |
| #define I2C_PORT_NUM 0 |
| #define MAX22200_SPI_CLOCK_HZ 5000000 |
| #define NTC_ADC_CHANNEL 0 |
| #define NTC_ADC_UNIT 0 |
| #define PCA9685_I2C_ADDR 0x40 |
| #define PCAL95555_I2C_ADDR 0x20 |
| #define PIN_AS5047U_CS 10 |
| #define PIN_BNO08X_INT 4 |
| #define PIN_BNO08X_RST 5 |
| #define PIN_I2C_SCL 9 |
| #define PIN_I2C_SDA 8 |
| #define PIN_MAX22200_CMD 45 |
| #define PIN_MAX22200_CS 36 |
| #define PIN_MAX22200_ENABLE 35 |
| #define PIN_MAX22200_FAULT 48 |
| #define PIN_PCAL95555_INT 6 |
| #define PIN_SPI_MISO 13 |
| #define PIN_SPI_MOSI 11 |
| #define PIN_SPI_SCLK 12 |
| #define PIN_TLE92466ED_CS 41 |
| #define PIN_TLE92466ED_EN 2 |
| #define PIN_TLE92466ED_FAULTN 1 |
| #define PIN_TLE92466ED_RESN 42 |
| #define PIN_TMC5160_CS 37 |
| #define PIN_TMC5160_DIAG0 39 |
| #define PIN_TMC5160_DIAG1 40 |
| #define PIN_TMC5160_DRV_ENN 38 |
| #define PIN_TMC9660_CS 15 |
| #define PIN_TMC9660_DRV_EN 17 |
| #define PIN_TMC9660_FAULTN 18 |
| #define PIN_TMC9660_RST 16 |
| #define PIN_TMC9660_WAKE 21 |
| #define PIN_WS2812_DATA 48 |
| #define SPI_HOST_ID 1 |
| #define TLE92466ED_SPI_CLOCK_HZ 5000000 |
| #define TMC5160_SPI_CLOCK_HZ 4000000 |
| #define TMC9660_DEVICE_ADDR 1 |
| #define TMC9660_SPI_CLOCK_HZ 4000000 |
| #define WS2812_NUM_LEDS 8 |
| #define WS2812_RMT_CHANNEL 0 |